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-rw-r--r--c/src/lib/libbsp/m68k/mvme147/timer/timerisr.S28
1 files changed, 28 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/m68k/mvme147/timer/timerisr.S b/c/src/lib/libbsp/m68k/mvme147/timer/timerisr.S
new file mode 100644
index 0000000000..7debd13849
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/mvme147/timer/timerisr.S
@@ -0,0 +1,28 @@
+/* timer_isr()
+ *
+ * This routine provides the ISR for the PCC timer on the MVME147
+ * board. The timer is set up to generate an interrupt at maximum
+ * intervals.
+ *
+ * MVME147 port for TNI - Telecom Bretagne
+ * by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
+ * May 1996
+ *
+ * $Id$
+ */
+
+#include "asm.h"
+
+BEGIN_CODE
+
+.set T1_CONTROL_REGISTER, 0xfffe1018 | timer 1 control register
+
+ PUBLIC (timerisr)
+SYM (timerisr):
+ orb #0x80, T1_CONTROL_REGISTER | clear T1 int status bit
+ addql #1, SYM (Ttimer_val) | increment timer value
+end_timerisr:
+ rte
+
+END_CODE
+END