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-rw-r--r--c/src/lib/libbsp/powerpc/eth_comm/ChangeLog9
-rw-r--r--c/src/lib/libbsp/powerpc/eth_comm/irq/irq_asm.S29
-rw-r--r--c/src/lib/libbsp/powerpc/mbx8xx/ChangeLog9
-rw-r--r--c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S27
-rw-r--r--c/src/lib/libbsp/powerpc/mpc8260ads/ChangeLog9
-rw-r--r--c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_asm.S28
-rw-r--r--c/src/lib/libbsp/powerpc/shared/ChangeLog9
-rw-r--r--c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S28
8 files changed, 130 insertions, 18 deletions
diff --git a/c/src/lib/libbsp/powerpc/eth_comm/ChangeLog b/c/src/lib/libbsp/powerpc/eth_comm/ChangeLog
index f3c5604ff6..49793a7aac 100644
--- a/c/src/lib/libbsp/powerpc/eth_comm/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/eth_comm/ChangeLog
@@ -1,3 +1,12 @@
+2005-10-06 Till Straumann <strauman@slac.stanford.edu>
+
+ PR 833/bsps
+ * irq/irq_asm.S: Currently, all (new exception) BSPs explicitely enable
+ the FPU across the user ISR but DONT save/restore the FPU context.
+ Any use of the FPU fron the user handler (e.g., due to GCC
+ optimizations) result in corruption. The fix results in an exception
+ in such cases (user ISR must explicitely save/enable/restore FPU).
+
2003-12-19 Joel Sherrill <joel@OARcorp.com>
PR 545/bsps
diff --git a/c/src/lib/libbsp/powerpc/eth_comm/irq/irq_asm.S b/c/src/lib/libbsp/powerpc/eth_comm/irq/irq_asm.S
index a6c0f98f10..21960828ef 100644
--- a/c/src/lib/libbsp/powerpc/eth_comm/irq/irq_asm.S
+++ b/c/src/lib/libbsp/powerpc/eth_comm/irq/irq_asm.S
@@ -12,6 +12,8 @@
* Till Straumann <strauman@slac.stanford.edu>, 2003/7:
* - store isr nesting level in _ISR_Nest_level rather than
* SPRG0 - RTEMS relies on that variable.
+ * Till Straumann <strauman@slac.stanford.edu>, 2005/4:
+ * - DONT enable FP across user USR since fpregs are never saved!!
*
* $Id$
*/
@@ -88,14 +90,8 @@ SYM (shared_raw_irq_code_entry):
/*
* Enable data and instruction address translation, exception recovery
*
- * also, on CPUs with FP, enable FP so that FP context can be
- * saved and restored (using FP instructions)
*/
-#if (PPC_HAS_FPU == 0)
ori r3, r3, MSR_RI | MSR_IR | MSR_DR
-#else
- ori r3, r3, MSR_RI | MSR_IR | MSR_DR | MSR_FP
-#endif
mtmsr r3
SYNC
/*
@@ -298,6 +294,27 @@ nested:
rfi
switch:
+#if ( PPC_HAS_FPU != 0 )
+#if ! defined( CPU_USE_DEFERRED_FP_SWITCH )
+#error missing include file???
+#endif
+ mfmsr r4
+#if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE )
+ /* if the executing thread has FP enabled propagate
+ * this now so _Thread_Dispatch can save/restore the FPREGS
+ * NOTE: it is *crucial* to disable the FPU across the
+ * user ISR [independent of using the 'deferred'
+ * strategy or not]. We don't save FP regs across
+ * the user ISR and hence we prefer an exception to
+ * be raised rather than experiencing corruption.
+ */
+ lwz r3, SRR1_FRAME_OFFSET(r1)
+ rlwimi r4, r3, 0, 18, 18 /* MSR_FP */
+#else
+ ori r4, r4, MSR_FP
+#endif
+ mtmsr r4
+#endif
bl SYM (_Thread_Dispatch)
easy_exit:
diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/ChangeLog b/c/src/lib/libbsp/powerpc/mbx8xx/ChangeLog
index 19aa7e73f6..f821ef7988 100644
--- a/c/src/lib/libbsp/powerpc/mbx8xx/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/mbx8xx/ChangeLog
@@ -1,3 +1,12 @@
+2005-10-06 Till Straumann <strauman@slac.stanford.edu>
+
+ PR 833/bsps
+ * irq/irq_asm.S: Currently, all (new exception) BSPs explicitely enable
+ the FPU across the user ISR but DONT save/restore the FPU context.
+ Any use of the FPU fron the user handler (e.g., due to GCC
+ optimizations) result in corruption. The fix results in an exception
+ in such cases (user ISR must explicitely save/enable/restore FPU).
+
2005-09-12 Thomas Doerfler <Thomas.Doerfler@imd-systems.de>
PR 527/bsps
diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S
index 9ca2c5ceb1..89fabaa910 100644
--- a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S
+++ b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S
@@ -12,6 +12,8 @@
* Till Straumann <strauman@slac.stanford.edu>, 2003/7:
* - store isr nesting level in _ISR_Nest_level rather than
* SPRG0 - RTEMS relies on that variable.
+ * Till Straumann <strauman@slac.stanford.edu>, 2005/4:
+ * - DONT enable FP across user ISR since fpregs are never saved!!
*
* $Id$
*/
@@ -127,11 +129,7 @@ SYM (shared_raw_irq_code_entry):
* also, on CPUs with FP, enable FP so that FP context can be
* saved and restored (using FP instructions)
*/
-#if (PPC_HAS_FPU == 0)
ori r3, r3, MSR_RI | MSR_IR | MSR_DR
-#else
- ori r3, r3, MSR_RI | MSR_IR | MSR_DR | MSR_FP
-#endif
mtmsr r3
SYNC
/*
@@ -338,6 +336,27 @@ nested:
rfi
switch:
+#if ( PPC_HAS_FPU != 0 )
+#if ! defined( CPU_USE_DEFERRED_FP_SWITCH )
+#error missing include file???
+#endif
+ mfmsr r4
+#if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE )
+ /* if the executing thread has FP enabled propagate
+ * this now so _Thread_Dispatch can save/restore the FPREGS
+ * NOTE: it is *crucial* to disable the FPU across the
+ * user ISR [independent of using the 'deferred'
+ * strategy or not]. We don't save FP regs across
+ * the user ISR and hence we prefer an exception to
+ * be raised rather than experiencing corruption.
+ */
+ lwz r3, SRR1_FRAME_OFFSET(r1)
+ rlwimi r4, r3, 0, 18, 18 /* MSR_FP */
+#else
+ ori r4, r4, MSR_FP
+#endif
+ mtmsr r4
+#endif
bl SYM (_Thread_Dispatch)
easy_exit:
diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/ChangeLog b/c/src/lib/libbsp/powerpc/mpc8260ads/ChangeLog
index 53c0e98cc0..f13a6f04bb 100644
--- a/c/src/lib/libbsp/powerpc/mpc8260ads/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/mpc8260ads/ChangeLog
@@ -1,3 +1,12 @@
+2005-10-06 Till Straumann <strauman@slac.stanford.edu>
+
+ PR 833/bsps
+ * irq/irq_asm.S: Currently, all (new exception) BSPs explicitely enable
+ the FPU across the user ISR but DONT save/restore the FPU context.
+ Any use of the FPU fron the user handler (e.g., due to GCC
+ optimizations) result in corruption. The fix results in an exception
+ in such cases (user ISR must explicitely save/enable/restore FPU).
+
2004-09-27 Joel Sherrill <joel@OARcorp.com>
PR 680/bsps
diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_asm.S b/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_asm.S
index f38d3dad83..e42a7060e3 100644
--- a/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_asm.S
+++ b/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_asm.S
@@ -12,6 +12,9 @@
* Modifications to store nesting level in global _ISR_Nest_level
* variable instead of SPRG0. Andy Dachs <a.dachs@sstl.co.uk>
*
+ * Till Straumann <strauman@slac.stanford.edu>, 2005/4:
+ * - DONT enable FP across user ISR since fpregs are never saved!!
+ *
* $Id$
*/
@@ -93,11 +96,7 @@ SYM (shared_raw_irq_code_entry):
* also, on CPUs with FP, enable FP so that FP context can be
* saved and restored (using FP instructions)
*/
-#if (PPC_HAS_FPU == 0)
ori r3, r3, MSR_RI /*| MSR_IR | MSR_DR*/
-#else
- ori r3, r3, MSR_RI | /*MSR_IR | MSR_DR |*/ MSR_FP
-#endif
mtmsr r3
SYNC
@@ -301,6 +300,27 @@ nested:
rfi
switch:
+#if ( PPC_HAS_FPU != 0 )
+#if ! defined( CPU_USE_DEFERRED_FP_SWITCH )
+#error missing include file???
+#endif
+ mfmsr r4
+#if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE )
+ /* if the executing thread has FP enabled propagate
+ * this now so _Thread_Dispatch can save/restore the FPREGS
+ * NOTE: it is *crucial* to disable the FPU across the
+ * user ISR [independent of using the 'deferred'
+ * strategy or not]. We don't save FP regs across
+ * the user ISR and hence we prefer an exception to
+ * be raised rather than experiencing corruption.
+ */
+ lwz r3, SRR1_FRAME_OFFSET(r1)
+ rlwimi r4, r3, 0, 18, 18 /* MSR_FP */
+#else
+ ori r4, r4, MSR_FP
+#endif
+ mtmsr r4
+#endif
bl SYM (_Thread_Dispatch)
easy_exit:
diff --git a/c/src/lib/libbsp/powerpc/shared/ChangeLog b/c/src/lib/libbsp/powerpc/shared/ChangeLog
index dc44121a4c..1210b3d444 100644
--- a/c/src/lib/libbsp/powerpc/shared/ChangeLog
+++ b/c/src/lib/libbsp/powerpc/shared/ChangeLog
@@ -1,3 +1,12 @@
+2005-10-06 Till Straumann <strauman@slac.stanford.edu>
+
+ PR 833/bsps
+ * irq/irq_asm.S: Currently, all (new exception) BSPs explicitely enable
+ the FPU across the user ISR but DONT save/restore the FPU context.
+ Any use of the FPU fron the user handler (e.g., due to GCC
+ optimizations) result in corruption. The fix results in an exception
+ in such cases (user ISR must explicitely save/enable/restore FPU).
+
2005-09-01 Joel Sherrill <joel@OARcorp.com>
* include/bsp.h: This file is only to be used by BSPs with the new
diff --git a/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S b/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S
index a2be56d753..a87cd625ce 100644
--- a/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S
+++ b/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S
@@ -12,6 +12,9 @@
* Till Straumann <strauman@slac.stanford.edu>, 2003/7:
* - store isr nesting level in _ISR_Nest_level rather than
* SPRG0 - RTEMS relies on that variable.
+ * Till Straumann <strauman@slac.stanford.edu>, 2005/4:
+ * - DONT enable FP across ISR since fpregs are not saved!!
+ * FPU is used by Thread_Dispatch however...
*
* $Id$
*/
@@ -95,11 +98,7 @@ SYM (shared_raw_irq_code_entry):
* also, on CPUs with FP, enable FP so that FP context can be
* saved and restored (using FP instructions)
*/
-#if (PPC_HAS_FPU == 0)
ori r3, r3, MSR_RI | MSR_IR | MSR_DR
-#else
- ori r3, r3, MSR_RI | MSR_IR | MSR_DR | MSR_FP
-#endif
mtmsr r3
SYNC
/*
@@ -302,6 +301,27 @@ nested:
rfi
switch:
+#if ( PPC_HAS_FPU != 0 )
+#if ! defined( CPU_USE_DEFERRED_FP_SWITCH )
+#error missing include file???
+#endif
+ mfmsr r4
+#if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE )
+ /* if the executing thread has FP enabled propagate
+ * this now so _Thread_Dispatch can save/restore the FPREGS
+ * NOTE: it is *crucial* to disable the FPU across the
+ * user ISR [independent of using the 'deferred'
+ * strategy or not]. We don't save FP regs across
+ * the user ISR and hence we prefer an exception to
+ * be raised rather than experiencing corruption.
+ */
+ lwz r3, SRR1_FRAME_OFFSET(r1)
+ rlwimi r4, r3, 0, 18, 18 /* MSR_FP */
+#else
+ ori r4, r4, MSR_FP
+#endif
+ mtmsr r4
+#endif
bl SYM (_Thread_Dispatch)
easy_exit:
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-22 16:47:05 +0000