diff options
25 files changed, 1894 insertions, 0 deletions
diff --git a/c/src/lib/libbsp/arm/acinclude.m4 b/c/src/lib/libbsp/arm/acinclude.m4 index 6214bb7dfd..5fd1391338 100644 --- a/c/src/lib/libbsp/arm/acinclude.m4 +++ b/c/src/lib/libbsp/arm/acinclude.m4 @@ -26,6 +26,8 @@ AC_DEFUN([RTEMS_CHECK_BSPDIR], AC_CONFIG_SUBDIRS([nds]);; raspberrypi ) AC_CONFIG_SUBDIRS([raspberrypi]);; + realview-pbx-a9 ) + AC_CONFIG_SUBDIRS([realview-pbx-a9]);; rtl22xx ) AC_CONFIG_SUBDIRS([rtl22xx]);; smdk2410 ) diff --git a/c/src/lib/libbsp/arm/realview-pbx-a9/Makefile.am b/c/src/lib/libbsp/arm/realview-pbx-a9/Makefile.am new file mode 100644 index 0000000000..e1b8741fb0 --- /dev/null +++ b/c/src/lib/libbsp/arm/realview-pbx-a9/Makefile.am @@ -0,0 +1,130 @@ +## +# +# @file +# +# @brief Makefile of LibBSP for the RealView PBX A9 board. +# + +ACLOCAL_AMFLAGS = -I ../../../../aclocal + +include $(top_srcdir)/../../../../automake/compile.am + +include_bspdir = $(includedir)/bsp +include_libcpudir = $(includedir)/libcpu + +dist_project_lib_DATA = bsp_specs + +############################################################################### +# Header # +############################################################################### + +include_HEADERS = include/bsp.h +include_HEADERS += include/tm27.h + +nodist_include_HEADERS = ../../shared/include/coverhd.h \ + include/bspopts.h + +nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h + +include_bsp_HEADERS = +include_bsp_HEADERS += ../../shared/include/utility.h +include_bsp_HEADERS += ../../shared/include/irq-generic.h +include_bsp_HEADERS += ../../shared/include/irq-info.h +include_bsp_HEADERS += ../../shared/include/stackalloc.h +include_bsp_HEADERS += ../../shared/tod.h +include_bsp_HEADERS += ../shared/include/start.h +include_bsp_HEADERS += ../shared/include/arm-a9mpcore-irq.h +include_bsp_HEADERS += ../shared/include/arm-a9mpcore-regs.h +include_bsp_HEADERS += ../shared/include/arm-cp15-start.h +include_bsp_HEADERS += ../shared/include/arm-gic.h +include_bsp_HEADERS += ../shared/include/arm-gic-irq.h +include_bsp_HEADERS += ../shared/include/arm-gic-regs.h +include_bsp_HEADERS += ../shared/include/arm-pl011.h +include_bsp_HEADERS += ../shared/include/arm-pl011-regs.h +include_bsp_HEADERS += include/irq.h + +include_libcpu_HEADERS = ../../../libcpu/arm/shared/include/arm-cp15.h + +############################################################################### +# Data # +############################################################################### + +noinst_LIBRARIES = libbspstart.a + +libbspstart_a_SOURCES = ../shared/start/start.S + +project_lib_DATA = start.$(OBJEXT) + +project_lib_DATA += startup/linkcmds + +EXTRA_DIST = + +############################################################################### +# LibBSP # +############################################################################### + +noinst_LIBRARIES += libbsp.a + +libbsp_a_SOURCES = +libbsp_a_CPPFLAGS = +libbsp_a_LIBADD = + +# Shared +libbsp_a_SOURCES += ../../shared/bootcard.c +libbsp_a_SOURCES += ../../shared/bspclean.c +libbsp_a_SOURCES += ../../shared/bspgetworkarea.c +libbsp_a_SOURCES += ../../shared/bsplibc.c +libbsp_a_SOURCES += ../../shared/bsppost.c +libbsp_a_SOURCES += ../../shared/bsppredriverhook.c +libbsp_a_SOURCES += ../../shared/bsppretaskinghook.c +libbsp_a_SOURCES += ../../shared/gnatinstallhandler.c +libbsp_a_SOURCES += ../../shared/sbrk.c +libbsp_a_SOURCES += ../../shared/timerstub.c +libbsp_a_SOURCES += ../../shared/src/stackalloc.c +libbsp_a_SOURCES += ../shared/abort/simple_abort.c +libbsp_a_SOURCES += ../shared/startup/bsp-start-memcpy.S +libbsp_a_SOURCES += ../shared/arm-cp15-set-exception-handler.c +libbsp_a_SOURCES += ../shared/arm-cp15-set-ttb-entries.c + +# Startup +libbsp_a_SOURCES += startup/bspreset.c +libbsp_a_SOURCES += startup/bspstart.c + +# IRQ +libbsp_a_SOURCES += ../../shared/src/irq-default-handler.c +libbsp_a_SOURCES += ../../shared/src/irq-generic.c +libbsp_a_SOURCES += ../../shared/src/irq-info.c +libbsp_a_SOURCES += ../../shared/src/irq-legacy.c +libbsp_a_SOURCES += ../../shared/src/irq-server.c +libbsp_a_SOURCES += ../../shared/src/irq-shell.c +libbsp_a_SOURCES += ../shared/arm-gic-irq.c + +# Console +libbsp_a_SOURCES += ../../shared/console.c +libbsp_a_SOURCES += ../../shared/console_control.c +libbsp_a_SOURCES += ../../shared/console_read.c +libbsp_a_SOURCES += ../../shared/console_select.c +libbsp_a_SOURCES += ../../shared/console_write.c +libbsp_a_SOURCES += ../shared/arm-pl011.c +libbsp_a_SOURCES += console/console-config.c + +# Clock +libbsp_a_SOURCES += ../../shared/clockdrv_shell.h +libbsp_a_SOURCES += ../shared/arm-a9mpcore-clock-config.c + +# Cache +libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c +libbsp_a_SOURCES += ../../../libcpu/arm/shared/include/cache_.h +libbsp_a_CPPFLAGS += -I$(srcdir)/../../../libcpu/arm/shared/include + +# Start hooks +libbsp_a_SOURCES += startup/bspstarthooks.c + +############################################################################### +# Special Rules # +############################################################################### + +DISTCLEANFILES = include/bspopts.h + +include $(srcdir)/preinstall.am +include $(top_srcdir)/../../../../automake/local.am diff --git a/c/src/lib/libbsp/arm/realview-pbx-a9/README b/c/src/lib/libbsp/arm/realview-pbx-a9/README new file mode 100644 index 0000000000..8fdfdc45f3 --- /dev/null +++ b/c/src/lib/libbsp/arm/realview-pbx-a9/README @@ -0,0 +1,13 @@ +Tested only on Qemu. + +git clone git://git.qemu.org/qemu.git qemu +cd qemu +git co a1bff71c56f2d1048244c829b63797940dd4ba0e +mkdir build +cd build +../configure --prefix=/opt/qemu --interp-prefix=/opt/qemu +make +make install +export PATH="$PATH:/opt/qemu/bin" + +qemu-system-arm -S -s -no-reboot -net none -nographic -M realview-pbx-a9 -m 256M -kernel ticker.exe diff --git a/c/src/lib/libbsp/arm/realview-pbx-a9/bsp_specs b/c/src/lib/libbsp/arm/realview-pbx-a9/bsp_specs new file mode 100644 index 0000000000..082653ad22 --- /dev/null +++ b/c/src/lib/libbsp/arm/realview-pbx-a9/bsp_specs @@ -0,0 +1,13 @@ +%rename endfile old_endfile +%rename startfile old_startfile +%rename link old_link + +*startfile: +%{!qrtems: %(old_startfile)} \ +%{!nostdlib: %{qrtems: start.o%s crti.o%s crtbegin.o%s -e _start}} + +*link: +%{!qrtems: %(old_link)} %{qrtems: -dc -dp -N} + +*endfile: +%{!qrtems: *(old_endfiles)} %{qrtems: crtend.o%s crtn.o%s } diff --git a/c/src/lib/libbsp/arm/realview-pbx-a9/configure.ac b/c/src/lib/libbsp/arm/realview-pbx-a9/configure.ac new file mode 100644 index 0000000000..4421675da5 --- /dev/null +++ b/c/src/lib/libbsp/arm/realview-pbx-a9/configure.ac @@ -0,0 +1,34 @@ +## +# +# @file +# +# @brief Configure script of LibBSP for the RealView PBX A9 board. +# + +AC_PREREQ([2.69]) +AC_INIT([rtems-c-src-lib-libbsp-arm-realview-bpx-a9],[_RTEMS_VERSION],[http://www.rtems.org/bugzilla]) +AC_CONFIG_SRCDIR([bsp_specs]) +RTEMS_TOP(../../../../../..) + +RTEMS_CANONICAL_TARGET_CPU +AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.12.2]) +RTEMS_BSP_CONFIGURE + +RTEMS_PROG_CC_FOR_TARGET +RTEMS_CANONICALIZE_TOOLS +RTEMS_PROG_CCAS + +RTEMS_CHECK_NETWORKING +AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes") + +RTEMS_BSPOPTS_SET([BSP_START_RESET_VECTOR],[*],[]) +RTEMS_BSPOPTS_HELP([BSP_START_RESET_VECTOR],[reset vector address for BSP start]) + +RTEMS_BSPOPTS_SET([BSP_ARM_A9MPCORE_PERIPHCLK],[*],[100000000U]) +RTEMS_BSPOPTS_HELP([BSP_ARM_A9MPCORE_PERIPHCLK],[ARM Cortex-A9 MPCore PERIPHCLK clock frequency in Hz]) + +RTEMS_BSP_CLEANUP_OPTIONS(0, 1) +RTEMS_BSP_LINKCMDS + +AC_CONFIG_FILES([Makefile]) +AC_OUTPUT diff --git a/c/src/lib/libbsp/arm/realview-pbx-a9/console/console-config.c b/c/src/lib/libbsp/arm/realview-pbx-a9/console/console-config.c new file mode 100644 index 0000000000..e95280b70a --- /dev/null +++ b/c/src/lib/libbsp/arm/realview-pbx-a9/console/console-config.c @@ -0,0 +1,75 @@ +/* + * Copyright (c) 2013 embedded brains GmbH. All rights reserved. + * + * embedded brains GmbH + * Dornierstr. 4 + * 82178 Puchheim + * Germany + * <info@embedded-brains.de> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.com/license/LICENSE. + */ + +#include <libchip/serial.h> + +#include <bsp.h> +#include <bsp/irq.h> +#include <bsp/arm-pl011.h> + +console_tbl Console_Configuration_Ports[] = { + { + .sDeviceName = "/dev/ttyS0", + .deviceType = SERIAL_CUSTOM, + .pDeviceFns = &arm_pl011_fns, + .deviceProbe = NULL, + .pDeviceFlow = NULL, + .ulMargin = 10, + .ulHysteresis = 0, + .pDeviceParams = (void *) 115200, + .ulCtrlPort1 = 0x10009000, + .ulCtrlPort2 = 0, + .ulDataPort = 0, + .getRegister = NULL, + .setRegister = NULL, + .getData = NULL, + .setData = NULL, + .ulClock = 0, + .ulIntVector = RVPBXA9_IRQ_UART_0 + } +}; + +unsigned long Console_Configuration_Count = + RTEMS_ARRAY_SIZE(Console_Configuration_Ports); + +static void output_char(char c) +{ + int minor = (int) Console_Port_Minor; + const console_tbl *ct = Console_Port_Tbl != NULL ? + Console_Port_Tbl[minor] : &Console_Configuration_Ports[minor]; + const console_fns *cf = ct->pDeviceFns; + + if (c == '\n') { + (*cf->deviceWritePolled)(minor, '\r'); + } + + (*cf->deviceWritePolled)(minor, c); +} + +static void output_char_init(char c) +{ + if (Console_Port_Tbl == NULL) { + int minor = (int) Console_Port_Minor; + const console_fns *cf = Console_Configuration_Ports[minor].pDeviceFns; + + (*cf->deviceInitialize)(minor); + } + + BSP_output_char = output_char; + output_char(c); +} + +BSP_output_char_function_type BSP_output_char = output_char_init; + +BSP_polling_getchar_function_type BSP_poll_char = NULL; diff --git a/c/src/lib/libbsp/arm/realview-pbx-a9/include/bsp.h b/c/src/lib/libbsp/arm/realview-pbx-a9/include/bsp.h new file mode 100644 index 0000000000..4e89635e01 --- /dev/null +++ b/c/src/lib/libbsp/arm/realview-pbx-a9/include/bsp.h @@ -0,0 +1,76 @@ +/* + * Copyright (c) 2013 embedded brains GmbH. All rights reserved. + * + * embedded brains GmbH + * Dornierstr. 4 + * 82178 Puchheim + * Germany + * <info@embedded-brains.de> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.com/license/LICENSE. + */ + +#ifndef LIBBSP_ARM_REALVIEW_PBX_A9_BSP_H +#define LIBBSP_ARM_REALVIEW_PBX_A9_BSP_H + +#include <bspopts.h> + +#define BSP_FEATURE_IRQ_EXTENSION + +#ifndef ASM + +#include <rtems.h> +#include <rtems/console.h> +#include <rtems/clockdrv.h> + +#include <bsp/default-initial-extension.h> + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +#define BSP_ARM_MMU_CLIENT_DOMAIN 15U + +#define BSP_ARM_MMU_READ_ONLY \ + ((BSP_ARM_MMU_CLIENT_DOMAIN << ARM_MMU_SECT_DOMAIN_SHIFT) \ + | ARM_MMU_SECT_AP_0 \ + | ARM_MMU_SECT_AP_2 \ + | ARM_MMU_SECT_DEFAULT) + +#define BSP_ARM_MMU_READ_ONLY_CACHED \ + (BSP_ARM_MMU_READ_ONLY | ARM_MMU_SECT_C | ARM_MMU_SECT_B) + +#define BSP_ARM_MMU_READ_WRITE \ + ((BSP_ARM_MMU_CLIENT_DOMAIN << ARM_MMU_SECT_DOMAIN_SHIFT) \ + | ARM_MMU_SECT_AP_0 \ + | ARM_MMU_SECT_DEFAULT) + +#define BSP_ARM_MMU_READ_WRITE_CACHED \ + (BSP_ARM_MMU_READ_WRITE | ARM_MMU_SECT_C | ARM_MMU_SECT_B) + +#define BSP_ARM_MMU_READ_WRITE_DATA \ + BSP_ARM_MMU_READ_WRITE_CACHED + +#define BSP_ARM_MMU_READ_ONLY_DATA \ + BSP_ARM_MMU_READ_ONLY_CACHED + +#define BSP_ARM_MMU_CODE BSP_ARM_MMU_READ_ONLY_CACHED + +#define BSP_ARM_A9MPCORE_PT_BASE 0x1f000600 + +typedef enum { + BSP_ARM_A9MPCORE_FATAL_CLOCK_IRQ_INSTALL, + BSP_ARM_A9MPCORE_FATAL_CLOCK_IRQ_REMOVE +} rvpbxa9_fatal_code; + +void rvpbxa9_fatal(rvpbxa9_fatal_code code) RTEMS_COMPILER_NO_RETURN_ATTRIBUTE; + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* ASM */ + +#endif /* LIBBSP_ARM_REALVIEW_PBX_A9_BSP_H */ diff --git a/c/src/lib/libbsp/arm/realview-pbx-a9/include/irq.h b/c/src/lib/libbsp/arm/realview-pbx-a9/include/irq.h new file mode 100644 index 0000000000..2651d6c201 --- /dev/null +++ b/c/src/lib/libbsp/arm/realview-pbx-a9/include/irq.h @@ -0,0 +1,90 @@ +/* + * Copyright (c) 2013 embedded brains GmbH. All rights reserved. + * + * embedded brains GmbH + * Dornierstr. 4 + * 82178 Puchheim + * Germany + * <info@embedded-brains.de> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.com/license/LICENSE. + */ + +#ifndef LIBBSP_ARM_REALVIEW_PBX_A9_IRQ_H +#define LIBBSP_ARM_REALVIEW_PBX_A9_IRQ_H + +#ifndef ASM + +#include <rtems/irq.h> +#include <rtems/irq-extension.h> + +#include <bsp/arm-a9mpcore-irq.h> +#include <bsp/arm-gic-irq.h> + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +#define RVPBXA9_IRQ_WATCHDOG_0 32 +#define RVPBXA9_IRQ_SW_IRQ 33 +#define RVPBXA9_IRQ_TIMER_0_1 36 +#define RVPBXA9_IRQ_TIMER_2_3 37 +#define RVPBXA9_IRQ_GPIO_0 38 +#define RVPBXA9_IRQ_GPIO_1 39 +#define RVPBXA9_IRQ_GPIO_2 40 +#define RVPBXA9_IRQ_RTC 42 +#define RVPBXA9_IRQ_SSP 43 +#define RVPBXA9_IRQ_UART_0 44 +#define RVPBXA9_IRQ_UART_1 45 +#define RVPBXA9_IRQ_UART_2 46 +#define RVPBXA9_IRQ_UART_3 47 +#define RVPBXA9_IRQ_SCI 48 +#define RVPBXA9_IRQ_MCI_A 49 +#define RVPBXA9_IRQ_MCI_B 50 +#define RVPBXA9_IRQ_AACI 51 +#define RVPBXA9_IRQ_KMI0 52 +#define RVPBXA9_IRQ_KMI1 53 +#define RVPBXA9_IRQ_CLCD 55 +#define RVPBXA9_IRQ_DMAC 56 +#define RVPBXA9_IRQ_PWRFAIL 57 +#define RVPBXA9_IRQ_CF_INT 59 +#define RVPBXA9_IRQ_ETHERNET 60 +#define RVPBXA9_IRQ_USB 61 +#define RVPBXA9_IRQ_T1_INT_0 64 +#define RVPBXA9_IRQ_T1_INT_1 65 +#define RVPBXA9_IRQ_T1_INT_2 66 +#define RVPBXA9_IRQ_T1_INT_3 67 +#define RVPBXA9_IRQ_T1_INT_4 68 +#define RVPBXA9_IRQ_T1_INT_5 69 +#define RVPBXA9_IRQ_T1_INT_6 70 +#define RVPBXA9_IRQ_T1_INT_7 71 +#define RVPBXA9_IRQ_WATCHDOG_1 72 +#define RVPBXA9_IRQ_TIMER_4_5 73 +#define RVPBXA9_IRQ_TIMER_6_7 74 +#define RVPBXA9_IRQ_PCI_INTR 80 +#define RVPBXA9_IRQ_P_NMI 81 +#define RVPBXA9_IRQ_P_NINT_0 82 +#define RVPBXA9_IRQ_P_NINT_1 83 +#define RVPBXA9_IRQ_P_NINT_2 84 +#define RVPBXA9_IRQ_P_NINT_3 85 +#define RVPBXA9_IRQ_P_NINT_4 86 +#define RVPBXA9_IRQ_P_NINT_5 87 +#define RVPBXA9_IRQ_P_NINT_6 88 +#define RVPBXA9_IRQ_P_NINT_7 89 + +#define BSP_INTERRUPT_VECTOR_MIN 0 +#define BSP_INTERRUPT_VECTOR_MAX 89 + +#define BSP_ARM_GIC_CPUIF_BASE 0x1f000100 + +#define BSP_ARM_GIC_DIST_BASE 0x1f001000 + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* ASM */ + +#endif /* LIBBSP_ARM_REALVIEW_PBX_A9_IRQ_H */ diff --git a/c/src/lib/libbsp/arm/realview-pbx-a9/include/tm27.h b/c/src/lib/libbsp/arm/realview-pbx-a9/include/tm27.h new file mode 100644 index 0000000000..2a31e8950d --- /dev/null +++ b/c/src/lib/libbsp/arm/realview-pbx-a9/include/tm27.h @@ -0,0 +1,81 @@ +/* + * Copyright (c) 2013 embedded brains GmbH. All rights reserved. + * + * embedded brains GmbH + * Dornierstr. 4 + * 82178 Puchheim + * Germany + * <info@embedded-brains.de> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.com/license/LICENSE. + */ + +#ifndef _RTEMS_TMTEST27 +#error "This is an RTEMS internal file you must not include directly." +#endif + +#ifndef __tm27_h +#define __tm27_h + +#include <assert.h> + +#include <bsp.h> +#include <bsp/irq.h> + +#define MUST_WAIT_FOR_INTERRUPT 1 + +#define RVPBXA9_TM27_IRQ ARM_GIC_IRQ_SGI_13 + +#define RVPBXA9_TM27_PRIO_LOW 0xfe + +#define RVPBXA9_TM27_PRIO_HIGH 0x00 + +static void Install_tm27_vector(void (*handler)(rtems_vector_number)) +{ + rtems_status_code sc = rtems_interrupt_handler_install( + RVPBXA9_TM27_IRQ, + "TM27", + RTEMS_INTERRUPT_UNIQUE, + (rtems_interrupt_handler) handler, + NULL + ); + assert(sc == RTEMS_SUCCESSFUL); + + sc = arm_gic_irq_set_priority( + RVPBXA9_TM27_IRQ, + RVPBXA9_TM27_PRIO_LOW + ); + assert(sc == RTEMS_SUCCESSFUL); +} + +static void Cause_tm27_intr(void) +{ + rtems_status_code sc = arm_gic_irq_generate_software_irq( + RVPBXA9_TM27_IRQ, + ARM_GIC_IRQ_SOFTWARE_IRQ_TO_SELF, + 0 + ); + assert(sc == RTEMS_SUCCESSFUL); +} + +static void Clear_tm27_intr(void) +{ + rtems_status_code sc = arm_gic_irq_set_priority( + RVPBXA9_TM27_IRQ, + RVPBXA9_TM27_PRIO_LOW + ); + assert(sc == RTEMS_SUCCESSFUL); +} + +static void Lower_tm27_intr(void) +{ + rtems_status_code sc = arm_gic_irq_set_priority( + RVPBXA9_TM27_IRQ, + RVPBXA9_TM27_PRIO_HIGH + ); + assert(sc == RTEMS_SUCCESSFUL); +} + +#endif /* __tm27_h */ diff --git a/c/src/lib/libbsp/arm/realview-pbx-a9/make/custom/realview_pbx_a9_qemu.cfg b/c/src/lib/libbsp/arm/realview-pbx-a9/make/custom/realview_pbx_a9_qemu.cfg new file mode 100644 index 0000000000..fbee00144b --- /dev/null +++ b/c/src/lib/libbsp/arm/realview-pbx-a9/make/custom/realview_pbx_a9_qemu.cfg @@ -0,0 +1,7 @@ +include $(RTEMS_ROOT)/make/custom/default.cfg + +RTEMS_CPU = arm + +CPU_CFLAGS = -mcpu=cortex-a9 -mthumb + +CFLAGS_OPTIMIZE_V ?= -O0 -g diff --git a/c/src/lib/libbsp/arm/realview-pbx-a9/preinstall.am b/c/src/lib/libbsp/arm/realview-pbx-a9/preinstall.am new file mode 100644 index 0000000000..fe641ac0b9 --- /dev/null +++ b/c/src/lib/libbsp/arm/realview-pbx-a9/preinstall.am @@ -0,0 +1,136 @@ +## Automatically generated by ampolish3 - Do not edit + +if AMPOLISH3 +$(srcdir)/preinstall.am: Makefile.am + $(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am +endif + +PREINSTALL_DIRS = +DISTCLEANFILES += $(PREINSTALL_DIRS) + +all-local: $(TMPINSTALL_FILES) + +TMPINSTALL_FILES = +CLEANFILES = $(TMPINSTALL_FILES) + +all-am: $(PREINSTALL_FILES) + +PREINSTALL_FILES = +CLEANFILES += $(PREINSTALL_FILES) + +$(PROJECT_LIB)/$(dirstamp): + @$(MKDIR_P) $(PROJECT_LIB) + @: > $(PROJECT_LIB)/$(dirstamp) +PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp) + +$(PROJECT_INCLUDE)/$(dirstamp): + @$(MKDIR_P) $(PROJECT_INCLUDE) + @: > $(PROJECT_INCLUDE)/$(dirstamp) +PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp) + +$(PROJECT_INCLUDE)/bsp/$(dirstamp): + @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp + @: > $(PROJECT_INCLUDE)/bsp/$(dirstamp) +PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp) + +$(PROJECT_INCLUDE)/libcpu/$(dirstamp): + @$(MKDIR_P) $(PROJECT_INCLUDE)/libcpu + @: > $(PROJECT_INCLUDE)/libcpu/$(dirstamp) +PREINSTALL_DIRS += $(PROJECT_INCLUDE)/libcpu/$(dirstamp) + +$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs +PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs + +$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h + +$(PROJECT_INCLUDE)/tm27.h: include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h +PREINSTALL_FILES += $(PROJECT_INCLUDE)/tm27.h + +$(PROJECT_INCLUDE)/coverhd.h: ../../shared/include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h +PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h + +$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h + +$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h + +$(PROJECT_INCLUDE)/bsp/utility.h: ../../shared/include/utility.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/utility.h +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/utility.h + +$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-generic.h + +$(PROJECT_INCLUDE)/bsp/irq-info.h: ../../shared/include/irq-info.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-info.h +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-info.h + +$(PROJECT_INCLUDE)/bsp/stackalloc.h: ../../shared/include/stackalloc.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/stackalloc.h +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/stackalloc.h + +$(PROJECT_INCLUDE)/bsp/tod.h: ../../shared/tod.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/tod.h +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/tod.h + +$(PROJECT_INCLUDE)/bsp/start.h: ../shared/include/start.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/start.h +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/start.h + +$(PROJECT_INCLUDE)/bsp/arm-a9mpcore-irq.h: ../shared/include/arm-a9mpcore-irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/arm-a9mpcore-irq.h +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/arm-a9mpcore-irq.h + +$(PROJECT_INCLUDE)/bsp/arm-a9mpcore-regs.h: ../shared/include/arm-a9mpcore-regs.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/arm-a9mpcore-regs.h +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/arm-a9mpcore-regs.h + +$(PROJECT_INCLUDE)/bsp/arm-cp15-start.h: ../shared/include/arm-cp15-start.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/arm-cp15-start.h +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/arm-cp15-start.h + +$(PROJECT_INCLUDE)/bsp/arm-gic.h: ../shared/include/arm-gic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/arm-gic.h +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/arm-gic.h + +$(PROJECT_INCLUDE)/bsp/arm-gic-irq.h: ../shared/include/arm-gic-irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/arm-gic-irq.h +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/arm-gic-irq.h + +$(PROJECT_INCLUDE)/bsp/arm-gic-regs.h: ../shared/include/arm-gic-regs.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/arm-gic-regs.h +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/arm-gic-regs.h + +$(PROJECT_INCLUDE)/bsp/arm-pl011.h: ../shared/include/arm-pl011.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/arm-pl011.h +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/arm-pl011.h + +$(PROJECT_INCLUDE)/bsp/arm-pl011-regs.h: ../shared/include/arm-pl011-regs.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/arm-pl011-regs.h +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/arm-pl011-regs.h + +$(PROJECT_INCLUDE)/bsp/irq.h: include/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h +PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h + +$(PROJECT_INCLUDE)/libcpu/arm-cp15.h: ../../../libcpu/arm/shared/include/arm-cp15.h $(PROJECT_INCLUDE)/libcpu/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/libcpu/arm-cp15.h +PREINSTALL_FILES += $(PROJECT_INCLUDE)/libcpu/arm-cp15.h + +$(PROJECT_LIB)/start.$(OBJEXT): start.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_LIB)/start.$(OBJEXT) +TMPINSTALL_FILES += $(PROJECT_LIB)/start.$(OBJEXT) + +$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp) + $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds +TMPINSTALL_FILES += $(PROJECT_LIB)/linkcmds + diff --git a/c/src/lib/libbsp/arm/realview-pbx-a9/startup/bspreset.c b/c/src/lib/libbsp/arm/realview-pbx-a9/startup/bspreset.c new file mode 100644 index 0000000000..fa1bb268aa --- /dev/null +++ b/c/src/lib/libbsp/arm/realview-pbx-a9/startup/bspreset.c @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2013 embedded brains GmbH. All rights reserved. + * + * embedded brains GmbH + * Dornierstr. 4 + * 82178 Puchheim + * Germany + * <info@embedded-brains.de> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.com/license/LICENSE. + */ + +#include <bsp/bootcard.h> + +void bsp_reset(void) +{ + volatile uint32_t *sys_lock = (volatile uint32_t *) 0x10000020; + volatile uint32_t *sys_resetctl = (volatile uint32_t *) 0x10000040; + + while (true) { + *sys_lock = 0xa05f; + *sys_resetctl = 0xf4; + } +} diff --git a/c/src/lib/libbsp/arm/realview-pbx-a9/startup/bspstart.c b/c/src/lib/libbsp/arm/realview-pbx-a9/startup/bspstart.c new file mode 100644 index 0000000000..d744fbc91c --- /dev/null +++ b/c/src/lib/libbsp/arm/realview-pbx-a9/startup/bspstart.c @@ -0,0 +1,27 @@ +/* + * Copyright (c) 2013 embedded brains GmbH. All rights reserved. + * + * embedded brains GmbH + * Dornierstr. 4 + * 82178 Puchheim + * Germany + * <info@embedded-brains.de> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.com/license/LICENSE. + */ + +#include <bsp.h> +#include <bsp/bootcard.h> +#include <bsp/irq-generic.h> + +void rvpbxa9_fatal(rvpbxa9_fatal_code code) +{ + rtems_fatal(RTEMS_FATAL_SOURCE_BSP_SPECIFIC, code); +} + +void bsp_start(void) +{ + bsp_interrupt_initialize(); +} diff --git a/c/src/lib/libbsp/arm/realview-pbx-a9/startup/bspstarthooks.c b/c/src/lib/libbsp/arm/realview-pbx-a9/startup/bspstarthooks.c new file mode 100644 index 0000000000..a049a55d1d --- /dev/null +++ b/c/src/lib/libbsp/arm/realview-pbx-a9/startup/bspstarthooks.c @@ -0,0 +1,99 @@ +/* + * Copyright (c) 2013 embedded brains GmbH. All rights reserved. + * + * embedded brains GmbH + * Dornierstr. 4 + * 82178 Puchheim + * Germany + * <info@embedded-brains.de> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.com/license/LICENSE. + */ + +#include <bsp.h> +#include <bsp/start.h> +#include <bsp/arm-cp15-start.h> +#include <bsp/linker-symbols.h> + +BSP_START_TEXT_SECTION void bsp_start_hook_0(void) +{ + /* Do nothing */ +} + +BSP_START_DATA_SECTION static const arm_cp15_start_section_config +rvpbxa9_mmu_config_table[] = { + { + .begin = (uint32_t) bsp_section_fast_text_begin, + .end = (uint32_t) bsp_section_fast_text_end, + .flags = BSP_ARM_MMU_CODE + }, { + .begin = (uint32_t) bsp_section_fast_data_begin, + .end = (uint32_t) bsp_section_fast_data_end, + .flags = BSP_ARM_MMU_READ_WRITE_DATA + }, { + .begin = (uint32_t) bsp_section_start_begin, + .end = (uint32_t) bsp_section_start_end, + .flags = BSP_ARM_MMU_CODE + }, { + .begin = (uint32_t) bsp_section_vector_begin, + .end = (uint32_t) bsp_section_vector_end, + .flags = BSP_ARM_MMU_READ_WRITE_CACHED + }, { + .begin = (uint32_t) bsp_section_text_begin, + .end = (uint32_t) bsp_section_text_end, + .flags = BSP_ARM_MMU_CODE + }, { + .begin = (uint32_t) bsp_section_rodata_begin, + .end = (uint32_t) bsp_section_rodata_end, + .flags = BSP_ARM_MMU_READ_ONLY_DATA + }, { + .begin = (uint32_t) bsp_section_data_begin, + .end = (uint32_t) bsp_section_data_end, + .flags = BSP_ARM_MMU_READ_WRITE_DATA + }, { + .begin = (uint32_t) bsp_section_bss_begin, + .end = (uint32_t) bsp_section_bss_end, + .flags = BSP_ARM_MMU_READ_WRITE_DATA + }, { + .begin = (uint32_t) bsp_section_work_begin, + .end = (uint32_t) bsp_section_work_end, + .flags = BSP_ARM_MMU_READ_WRITE_DATA + }, { + .begin = (uint32_t) bsp_section_stack_begin, + .end = (uint32_t) bsp_section_stack_end, + .flags = BSP_ARM_MMU_READ_WRITE_DATA + }, { + .begin = 0x10000000U, + .end = 0x10020000U, + .flags = BSP_ARM_MMU_READ_WRITE + }, { + .begin = 0x1f000000U, + .end = 0x20000000U, + .flags = BSP_ARM_MMU_READ_WRITE + } +}; + +BSP_START_TEXT_SECTION static void setup_mmu_and_cache(void) +{ + uint32_t ctrl = arm_cp15_start_setup_mmu_and_cache( + 0, + ARM_CP15_CTRL_AFE | ARM_CP15_CTRL_Z + ); + + arm_cp15_start_setup_translation_table_and_enable_mmu( + ctrl, + (uint32_t *) bsp_translation_table_base, + BSP_ARM_MMU_CLIENT_DOMAIN, + &rvpbxa9_mmu_config_table[0], + RTEMS_ARRAY_SIZE(rvpbxa9_mmu_config_table) + ); +} + +BSP_START_TEXT_SECTION void bsp_start_hook_1(void) +{ + bsp_start_copy_sections(); + setup_mmu_and_cache(); + bsp_start_clear_bss(); +} diff --git a/c/src/lib/libbsp/arm/realview-pbx-a9/startup/linkcmds b/c/src/lib/libbsp/arm/realview-pbx-a9/startup/linkcmds new file mode 100644 index 0000000000..0b5e3e06cf --- /dev/null +++ b/c/src/lib/libbsp/arm/realview-pbx-a9/startup/linkcmds @@ -0,0 +1,31 @@ +MEMORY { + RAM : ORIGIN = 0x00000000, LENGTH = 256M - 16k + RAM_MMU : ORIGIN = 0x0fffc000, LENGTH = 16k +} + +REGION_ALIAS ("REGION_START", RAM); +REGION_ALIAS ("REGION_VECTOR", RAM); +REGION_ALIAS ("REGION_TEXT", RAM); +REGION_ALIAS ("REGION_TEXT_LOAD", RAM); +REGION_ALIAS ("REGION_RODATA", RAM); +REGION_ALIAS ("REGION_RODATA_LOAD", RAM); +REGION_ALIAS ("REGION_DATA", RAM); +REGION_ALIAS ("REGION_DATA_LOAD", RAM); +REGION_ALIAS ("REGION_FAST_TEXT", RAM); +REGION_ALIAS ("REGION_FAST_TEXT_LOAD", RAM); +REGION_ALIAS ("REGION_FAST_DATA", RAM); +REGION_ALIAS ("REGION_FAST_DATA_LOAD", RAM); +REGION_ALIAS ("REGION_BSS", RAM); +REGION_ALIAS ("REGION_WORK", RAM); +REGION_ALIAS ("REGION_STACK", RAM); + +bsp_stack_irq_size = DEFINED (bsp_stack_irq_size) ? bsp_stack_irq_size : 4096; +bsp_stack_abt_size = DEFINED (bsp_stack_abt_size) ? bsp_stack_abt_size : 1024; + +bsp_section_rwbarrier_align = DEFINED (bsp_section_rwbarrier_align) ? bsp_section_rwbarrier_align : 1M; + +bsp_vector_table_in_start_section = 1; + +bsp_translation_table_base = ORIGIN (RAM_MMU); + +INCLUDE linkcmds.armv4 diff --git a/c/src/lib/libbsp/arm/shared/arm-a9mpcore-clock-config.c b/c/src/lib/libbsp/arm/shared/arm-a9mpcore-clock-config.c new file mode 100644 index 0000000000..b5c8ecb3b0 --- /dev/null +++ b/c/src/lib/libbsp/arm/shared/arm-a9mpcore-clock-config.c @@ -0,0 +1,116 @@ +/* + * Copyright (c) 2013 embedded brains GmbH. All rights reserved. + * + * embedded brains GmbH + * Dornierstr. 4 + * 82178 Puchheim + * Germany + * <info@embedded-brains.de> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.com/license/LICENSE. + */ + +#include <bsp.h> +#include <bsp/irq.h> +#include <bsp/arm-a9mpcore-regs.h> + +#define A9MPCORE_PT ((volatile a9mpcore_pt *) BSP_ARM_A9MPCORE_PT_BASE) + +/* This is defined in clockdrv_shell.h */ +void Clock_isr(rtems_irq_hdl_param arg); + +static void a9mpcore_clock_at_tick(void) +{ + volatile a9mpcore_pt *pt = A9MPCORE_PT; + + pt->irqst = A9MPCORE_PT_IRQST_EFLG; +} + +static void a9mpcore_clock_handler_install(void) +{ + rtems_status_code sc; + + sc = rtems_interrupt_handler_install( + A9MPCORE_IRQ_PT, + "Clock", + RTEMS_INTERRUPT_UNIQUE, + (rtems_interrupt_handler) Clock_isr, + NULL + ); + if (sc != RTEMS_SUCCESSFUL) { + rtems_fatal( + RTEMS_FATAL_SOURCE_BSP_SPECIFIC, + BSP_ARM_A9MPCORE_FATAL_CLOCK_IRQ_INSTALL + ); + } +} + +static void a9mpcore_clock_initialize(void) +{ + volatile a9mpcore_pt *pt = A9MPCORE_PT; + uint64_t interval = ((uint64_t) BSP_ARM_A9MPCORE_PERIPHCLK + * (uint64_t) rtems_configuration_get_microseconds_per_tick()) / 1000000; + + pt->load = (uint32_t) interval - 1; + pt->ctrl = A9MPCORE_PT_CTRL_AUTO_RLD + | A9MPCORE_PT_CTRL_IRQ_EN + | A9MPCORE_PT_CTRL_TMR_EN; +} + +static void a9mpcore_clock_cleanup(void) +{ + volatile a9mpcore_pt *pt = A9MPCORE_PT; + rtems_status_code sc; + + pt->ctrl = 0; + pt->irqst = A9MPCORE_PT_IRQST_EFLG; + + sc = rtems_interrupt_handler_remove( + A9MPCORE_IRQ_PT, + (rtems_interrupt_handler) Clock_isr, + NULL + ); + if (sc != RTEMS_SUCCESSFUL) { + rtems_fatal( + RTEMS_FATAL_SOURCE_BSP_SPECIFIC, + BSP_ARM_A9MPCORE_FATAL_CLOCK_IRQ_REMOVE + ); + } +} + +static uint32_t a9mpcore_clock_nanoseconds_since_last_tick(void) +{ + volatile a9mpcore_pt *pt = A9MPCORE_PT; + uint64_t k = (1000000000ULL << 32) / BSP_ARM_A9MPCORE_PERIPHCLK; + uint32_t c = pt->cntr; + uint32_t p = pt->load + 1; + + if ((pt->irqst & A9MPCORE_PT_IRQST_EFLG) != 0) { + c = pt->cntr + p; + } + + return (uint32_t) (((p - c) * k) >> 32); +} + +#define Clock_driver_support_at_tick() \ + a9mpcore_clock_at_tick() + +#define Clock_driver_support_initialize_hardware() \ + a9mpcore_clock_initialize() + +#define Clock_driver_support_install_isr(isr, old_isr) \ + do { \ + a9mpcore_clock_handler_install(); \ + old_isr = NULL; \ + } while (0) + +#define Clock_driver_support_shutdown_hardware() \ + a9mpcore_clock_cleanup() + +#define Clock_driver_nanoseconds_since_last_tick \ + a9mpcore_clock_nanoseconds_since_last_tick + +/* Include shared source clock driver code */ +#include "../../shared/clockdrv_shell.h" diff --git a/c/src/lib/libbsp/arm/shared/arm-gic-irq.c b/c/src/lib/libbsp/arm/shared/arm-gic-irq.c new file mode 100644 index 0000000000..bd3f624dff --- /dev/null +++ b/c/src/lib/libbsp/arm/shared/arm-gic-irq.c @@ -0,0 +1,174 @@ +/* + * Copyright (c) 2013 embedded brains GmbH. All rights reserved. + * + * embedded brains GmbH + * Dornierstr. 4 + * 82178 Puchheim + * Germany + * <info@embedded-brains.de> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.com/license/LICENSE. + */ + +#include <bsp/arm-gic.h> + +#include <rtems/score/armv4.h> + +#include <libcpu/arm-cp15.h> + +#include <bsp.h> +#include <bsp/irq.h> +#include <bsp/irq-generic.h> + +#define GIC_CPUIF ((volatile gic_cpuif *) BSP_ARM_GIC_CPUIF_BASE) + +#define GIC_DIST ((volatile gic_dist *) BSP_ARM_GIC_DIST_BASE) + +#define PRIORITY_DEFAULT 128 + +void bsp_interrupt_dispatch(void) +{ + volatile gic_cpuif *cpuif = GIC_CPUIF; + uint32_t icciar = cpuif->icciar; + rtems_vector_number vector = GIC_CPUIF_ICCIAR_ACKINTID_GET(icciar); + rtems_vector_number spurious = 1023; + + if (vector != spurious) { + uint32_t psr = _ARMV4_Status_irq_enable(); + + bsp_interrupt_handler_dispatch(vector); + + _ARMV4_Status_restore(psr); + + cpuif->icceoir = icciar; + } +} + +rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector) +{ + rtems_status_code sc = RTEMS_SUCCESSFUL; + + if (bsp_interrupt_is_valid_vector(vector)) { + volatile gic_dist *dist = GIC_DIST; + + gic_id_enable(dist, vector); + } else { + sc = RTEMS_INVALID_ID; + } + + return sc; +} + +rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector) +{ + rtems_status_code sc = RTEMS_SUCCESSFUL; + + if (bsp_interrupt_is_valid_vector(vector)) { + volatile gic_dist *dist = GIC_DIST; + + gic_id_disable(dist, vector); + } else { + sc = RTEMS_INVALID_ID; + } + + return sc; +} + +static inline uint32_t get_id_count(volatile gic_dist *dist) +{ + uint32_t id_count = GIC_DIST_ICDICTR_IT_LINES_NUMBER_GET(dist->icdictr); + + id_count = 32 * (id_count + 1); + id_count = id_count <= 1020 ? id_count : 1020; + + return id_count; +} + +rtems_status_code bsp_interrupt_facility_initialize(void) +{ + volatile gic_cpuif *cpuif = GIC_CPUIF; + volatile gic_dist *dist = GIC_DIST; + uint32_t id_count = get_id_count(dist); + uint32_t id; + + for (id = 0; id < id_count; ++id) { + gic_id_set_priority(dist, id, PRIORITY_DEFAULT); + } + + for (id = 32; id < id_count; ++id) { + gic_id_set_targets(dist, id, 0x01); + } + + cpuif->iccpmr = GIC_CPUIF_ICCPMR_PRIORITY(0xff); + cpuif->iccbpr = GIC_CPUIF_ICCBPR_BINARY_POINT(0x0); + cpuif->iccicr = GIC_CPUIF_ICCICR_ENABLE; + + dist->icddcr = GIC_DIST_ICDDCR_ENABLE; + + arm_cp15_set_exception_handler( + ARM_EXCEPTION_IRQ, + _ARMV4_Exception_interrupt, + BSP_ARM_MMU_READ_WRITE + ); + + return RTEMS_SUCCESSFUL; +} + +rtems_status_code arm_gic_irq_set_priority( + rtems_vector_number vector, + uint8_t priority +) +{ + rtems_status_code sc = RTEMS_SUCCESSFUL; + + if (bsp_interrupt_is_valid_vector(vector)) { + volatile gic_dist *dist = GIC_DIST; + + gic_id_set_priority(dist, vector, priority); + } else { + sc = RTEMS_INVALID_ID; + } + + return sc; +} + +rtems_status_code arm_gic_irq_get_priority( + rtems_vector_number vector, + uint8_t *priority +) +{ + rtems_status_code sc = RTEMS_SUCCESSFUL; + + if (bsp_interrupt_is_valid_vector(vector)) { + volatile gic_dist *dist = GIC_DIST; + + *priority = gic_id_get_priority(dist, vector); + } else { + sc = RTEMS_INVALID_ID; + } + + return sc; +} + +rtems_status_code arm_gic_irq_generate_software_irq( + rtems_vector_number vector, + arm_gic_irq_software_irq_target_filter filter, + uint8_t targets +) +{ + rtems_status_code sc = RTEMS_SUCCESSFUL; + + if (vector < 16) { + volatile gic_dist *dist = GIC_DIST; + + dist->icdsgir = GIC_DIST_ICDSGIR_TARGET_LIST_FILTER(filter) + | GIC_DIST_ICDSGIR_CPU_TARGET_LIST(targets) + | GIC_DIST_ICDSGIR_SGIINTID(vector); + } else { + sc = RTEMS_INVALID_ID; + } + + return sc; +} diff --git a/c/src/lib/libbsp/arm/shared/arm-pl011.c b/c/src/lib/libbsp/arm/shared/arm-pl011.c new file mode 100644 index 0000000000..e84b3e8473 --- /dev/null +++ b/c/src/lib/libbsp/arm/shared/arm-pl011.c @@ -0,0 +1,108 @@ +/* + * Copyright (c) 2013 embedded brains GmbH. All rights reserved. + * + * embedded brains GmbH + * Dornierstr. 4 + * 82178 Puchheim + * Germany + * <info@embedded-brains.de> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.com/license/LICENSE. + */ + +#include <bsp/arm-pl011.h> +#include <bsp/arm-pl011-regs.h> + +#include <libchip/sersupp.h> + +static volatile pl011 *pl011_get_regs(int minor) +{ + const console_tbl *ct = Console_Port_Tbl != NULL ? + Console_Port_Tbl[minor] : &Console_Configuration_Ports[minor]; + + return (volatile pl011 *) ct->ulCtrlPort1; +} + +static void pl011_initialize(int minor) +{ + volatile pl011 *regs = pl011_get_regs(minor); + + regs->uartlcr_h = PL011_UARTLCR_H_WLEN(PL011_UARTLCR_H_WLEN_8); + regs->uartcr = PL011_UARTCR_RXE + | PL011_UARTCR_TXE + | PL011_UARTCR_UARTEN; +} + +static int pl011_first_open(int major, int minor, void *arg) +{ + rtems_libio_open_close_args_t *oc = (rtems_libio_open_close_args_t *) arg; + struct rtems_termios_tty *tty = (struct rtems_termios_tty *) oc->iop->data1; + console_data *cd = &Console_Port_Data[minor]; + const console_tbl *ct = Console_Port_Tbl[minor]; + + cd->termios_data = tty; + rtems_termios_set_initial_baud(tty, (rtems_termios_baud_t) ct->pDeviceParams); + + return 0; +} + +static int pl011_last_close(int major, int minor, void *arg) +{ + return 0; +} + +static int pl011_read_polled(int minor) +{ + volatile pl011 *regs = pl011_get_regs(minor); + + if ((regs->uartfr & PL011_UARTFR_RXFE) != 0) { + return -1; + } else { + return PL011_UARTDR_DATA(regs->uartdr); + } +} + +static void pl011_write_polled(int minor, char c) +{ + volatile pl011 *regs = pl011_get_regs(minor); + + while ((regs->uartfr & PL011_UARTFR_TXFF) != 0) { + /* Wait */ + } + + regs->uartdr = PL011_UARTDR_DATA(c); +} + +static ssize_t pl011_write_support_polled( + int minor, + const char *s, + size_t n +) +{ + ssize_t i = 0; + + for (i = 0; i < n; ++i) { + pl011_write_polled(minor, s[i]); + } + + return n; +} + +static int pl011_set_attribues(int minor, const struct termios *term) +{ + return -1; +} + +const console_fns arm_pl011_fns = { + .deviceProbe = libchip_serial_default_probe, + .deviceFirstOpen = pl011_first_open, + .deviceLastClose = pl011_last_close, + .deviceRead = pl011_read_polled, + .deviceWrite = pl011_write_support_polled, + .deviceInitialize = pl011_initialize, + .deviceWritePolled = pl011_write_polled, + .deviceSetAttributes = pl011_set_attribues, + .deviceOutputUsesInterrupts = false +}; diff --git a/c/src/lib/libbsp/arm/shared/include/arm-a9mpcore-irq.h b/c/src/lib/libbsp/arm/shared/include/arm-a9mpcore-irq.h new file mode 100644 index 0000000000..0361d4fe00 --- /dev/null +++ b/c/src/lib/libbsp/arm/shared/include/arm-a9mpcore-irq.h @@ -0,0 +1,32 @@ +/* + * Copyright (c) 2013 embedded brains GmbH. All rights reserved. + * + * embedded brains GmbH + * Dornierstr. 4 + * 82178 Puchheim + * Germany + * <info@embedded-brains.de> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.com/license/LICENSE. + */ + +#ifndef LIBBSP_ARM_SHARED_ARM_A9MPCORE_IRQ_H +#define LIBBSP_ARM_SHARED_ARM_A9MPCORE_IRQ_H + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +#define A9MPCORE_IRQ_GT 27 +#define A9MPCORE_IRQ_NFIQ 28 +#define A9MPCORE_IRQ_PT 29 +#define A9MPCORE_IRQ_PW 30 +#define A9MPCORE_IRQ_NIRQ 31 + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* LIBBSP_ARM_SHARED_ARM_A9MPCORE_IRQ_H */ diff --git a/c/src/lib/libbsp/arm/shared/include/arm-a9mpcore-regs.h b/c/src/lib/libbsp/arm/shared/include/arm-a9mpcore-regs.h new file mode 100644 index 0000000000..7d8f637bad --- /dev/null +++ b/c/src/lib/libbsp/arm/shared/include/arm-a9mpcore-regs.h @@ -0,0 +1,86 @@ +/* + * Copyright (c) 2013 embedded brains GmbH. All rights reserved. + * + * embedded brains GmbH + * Dornierstr. 4 + * 82178 Puchheim + * Germany + * <info@embedded-brains.de> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.com/license/LICENSE. + */ + +#ifndef LIBBSP_ARM_SHARED_ARM_A9MPCORE_REGS_H +#define LIBBSP_ARM_SHARED_ARM_A9MPCORE_REGS_H + +#include <bsp/utility.h> + +typedef struct { + uint32_t ctrl; + uint32_t cfg; + uint32_t pwrst; + uint32_t invss; + uint32_t reserved_10[12]; + uint32_t fltstart; + uint32_t fltend; + uint32_t reserved_48[2]; + uint32_t sac; + uint32_t snsac; +} a9mpcore_scu; + +typedef struct { +} a9mpcore_gic; + +typedef struct { + uint32_t cntr; + uint32_t reserved_04; + uint32_t ctrl; + uint32_t irqst; + uint32_t cmpval; + uint32_t reserved_14; + uint32_t autoinc; +} a9mpcore_gt; + +typedef struct { + uint32_t load; + uint32_t cntr; + uint32_t ctrl; +#define A9MPCORE_PT_CTRL_PRESCALER(val) BSP_FLD32(val, 8, 15) +#define A9MPCORE_PT_CTRL_PRESCALER_GET(reg) BSP_FLD32GET(reg, 8, 15) +#define A9MPCORE_PT_CTRL_PRESCALER_SET(reg, val) BSP_FLD32SET(reg, val, 8, 15) +#define A9MPCORE_PT_CTRL_IRQ_EN BSP_BIT32(2) +#define A9MPCORE_PT_CTRL_AUTO_RLD BSP_BIT32(1) +#define A9MPCORE_PT_CTRL_TMR_EN BSP_BIT32(0) + uint32_t irqst; +#define A9MPCORE_PT_IRQST_EFLG BSP_BIT32(0) +} a9mpcore_pt; + +typedef struct { + uint32_t load; + uint32_t cntr; + uint32_t ctrl; + uint32_t irqst; + uint32_t rstst; + uint32_t dis; +} a9mpcore_pw; + +typedef struct { +} a9mpcore_idist; + +typedef struct { + a9mpcore_scu scu; + uint32_t reserved_58[42]; + a9mpcore_gic gic; + uint32_t reserved_100[64]; + a9mpcore_gt gt; + uint32_t reserved_21c[249]; + a9mpcore_pt pt; + uint32_t reserved_610[4]; + a9mpcore_pw pw; + uint32_t reserved_638[626]; + a9mpcore_idist idist; +} a9mpcore; + +#endif /* LIBBSP_ARM_SHARED_ARM_A9MPCORE_REGS_H */ diff --git a/c/src/lib/libbsp/arm/shared/include/arm-gic-irq.h b/c/src/lib/libbsp/arm/shared/include/arm-gic-irq.h new file mode 100644 index 0000000000..c45d3545d9 --- /dev/null +++ b/c/src/lib/libbsp/arm/shared/include/arm-gic-irq.h @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2013 embedded brains GmbH. All rights reserved. + * + * embedded brains GmbH + * Dornierstr. 4 + * 82178 Puchheim + * Germany + * <info@embedded-brains.de> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.com/license/LICENSE. + */ + +#ifndef LIBBSP_ARM_SHARED_ARM_GIC_IRQ_H +#define LIBBSP_ARM_SHARED_ARM_GIC_IRQ_H + +#include <rtems.h> + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +#define ARM_GIC_IRQ_SGI_0 0 +#define ARM_GIC_IRQ_SGI_1 1 +#define ARM_GIC_IRQ_SGI_2 2 +#define ARM_GIC_IRQ_SGI_3 3 +#define ARM_GIC_IRQ_SGI_5 5 +#define ARM_GIC_IRQ_SGI_6 6 +#define ARM_GIC_IRQ_SGI_7 7 +#define ARM_GIC_IRQ_SGI_8 8 +#define ARM_GIC_IRQ_SGI_9 9 +#define ARM_GIC_IRQ_SGI_10 10 +#define ARM_GIC_IRQ_SGI_11 11 +#define ARM_GIC_IRQ_SGI_12 12 +#define ARM_GIC_IRQ_SGI_13 13 +#define ARM_GIC_IRQ_SGI_14 14 +#define ARM_GIC_IRQ_SGI_15 15 + +rtems_status_code arm_gic_irq_set_priority( + rtems_vector_number vector, + uint8_t priority +); + +rtems_status_code arm_gic_irq_get_priority( + rtems_vector_number vector, + uint8_t *priority +); + +typedef enum { + ARM_GIC_IRQ_SOFTWARE_IRQ_TO_ALL_IN_LIST, + ARM_GIC_IRQ_SOFTWARE_IRQ_TO_ALL_EXCEPT_SELF, + ARM_GIC_IRQ_SOFTWARE_IRQ_TO_SELF +} arm_gic_irq_software_irq_target_filter; + +rtems_status_code arm_gic_irq_generate_software_irq( + rtems_vector_number vector, + arm_gic_irq_software_irq_target_filter filter, + uint8_t targets +); + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* LIBBSP_ARM_SHARED_ARM_GIC_IRQ_H */ diff --git a/c/src/lib/libbsp/arm/shared/include/arm-gic-regs.h b/c/src/lib/libbsp/arm/shared/include/arm-gic-regs.h new file mode 100644 index 0000000000..1c1608afa3 --- /dev/null +++ b/c/src/lib/libbsp/arm/shared/include/arm-gic-regs.h @@ -0,0 +1,130 @@ +/* + * Copyright (c) 2013 embedded brains GmbH. All rights reserved. + * + * embedded brains GmbH + * Dornierstr. 4 + * 82178 Puchheim + * Germany + * <info@embedded-brains.de> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.com/license/LICENSE. + */ + +#ifndef LIBBSP_ARM_SHARED_ARM_GIC_REGS_H +#define LIBBSP_ARM_SHARED_ARM_GIC_REGS_H + +#include <bsp/utility.h> + +typedef struct { + uint32_t iccicr; +#define GIC_CPUIF_ICCICR_ENABLE BSP_BIT32(0) + uint32_t iccpmr; +#define GIC_CPUIF_ICCPMR_PRIORITY(val) BSP_FLD32(val, 0, 7) +#define GIC_CPUIF_ICCPMR_PRIORITY_GET(reg) BSP_FLD32GET(reg, 0, 7) +#define GIC_CPUIF_ICCPMR_PRIORITY_SET(reg, val) BSP_FLD32SET(reg, val, 0, 7) + uint32_t iccbpr; +#define GIC_CPUIF_ICCBPR_BINARY_POINT(val) BSP_FLD32(val, 0, 2) +#define GIC_CPUIF_ICCBPR_BINARY_POINT_GET(reg) BSP_FLD32GET(reg, 0, 2) +#define GIC_CPUIF_ICCBPR_BINARY_POINT_SET(reg, val) BSP_FLD32SET(reg, val, 0, 2) + uint32_t icciar; +#define GIC_CPUIF_ICCIAR_CPUID(val) BSP_FLD32(val, 10, 12) +#define GIC_CPUIF_ICCIAR_CPUID_GET(reg) BSP_FLD32GET(reg, 10, 12) +#define GIC_CPUIF_ICCIAR_CPUID_SET(reg, val) BSP_FLD32SET(reg, val, 10, 12) +#define GIC_CPUIF_ICCIAR_ACKINTID(val) BSP_FLD32(val, 0, 9) +#define GIC_CPUIF_ICCIAR_ACKINTID_GET(reg) BSP_FLD32GET(reg, 0, 9) +#define GIC_CPUIF_ICCIAR_ACKINTID_SET(reg, val) BSP_FLD32SET(reg, val, 0, 9) + uint32_t icceoir; +#define GIC_CPUIF_ICCEOIR_CPUID(val) BSP_FLD32(val, 10, 12) +#define GIC_CPUIF_ICCEOIR_CPUID_GET(reg) BSP_FLD32GET(reg, 10, 12) +#define GIC_CPUIF_ICCEOIR_CPUID_SET(reg, val) BSP_FLD32SET(reg, val, 10, 12) +#define GIC_CPUIF_ICCEOIR_EOIINTID(val) BSP_FLD32(val, 0, 9) +#define GIC_CPUIF_ICCEOIR_EOIINTID_GET(reg) BSP_FLD32GET(reg, 0, 9) +#define GIC_CPUIF_ICCEOIR_EOIINTID_SET(reg, val) BSP_FLD32SET(reg, val, 0, 9) + uint32_t iccrpr; +#define GIC_CPUIF_ICCRPR_PRIORITY(val) BSP_FLD32(val, 0, 7) +#define GIC_CPUIF_ICCRPR_PRIORITY_GET(reg) BSP_FLD32GET(reg, 0, 7) +#define GIC_CPUIF_ICCRPR_PRIORITY_SET(reg, val) BSP_FLD32SET(reg, val, 0, 7) + uint32_t icchpir; +#define GIC_CPUIF_ICCHPIR_CPUID(val) BSP_FLD32(val, 10, 12) +#define GIC_CPUIF_ICCHPIR_CPUID_GET(reg) BSP_FLD32GET(reg, 10, 12) +#define GIC_CPUIF_ICCHPIR_CPUID_SET(reg, val) BSP_FLD32SET(reg, val, 10, 12) +#define GIC_CPUIF_ICCHPIR_PENDINTID(val) BSP_FLD32(val, 0, 9) +#define GIC_CPUIF_ICCHPIR_PENDINTID_GET(reg) BSP_FLD32GET(reg, 0, 9) +#define GIC_CPUIF_ICCHPIR_PENDINTID_SET(reg, val) BSP_FLD32SET(reg, val, 0, 9) + uint32_t iccabpr; +#define GIC_CPUIF_ICCABPR_BINARY_POINT(val) BSP_FLD32(val, 0, 2) +#define GIC_CPUIF_ICCABPR_BINARY_POINT_GET(reg) BSP_FLD32GET(reg, 0, 2) +#define GIC_CPUIF_ICCABPR_BINARY_POINT_SET(reg, val) BSP_FLD32SET(reg, val, 0, 2) + uint32_t reserved_20[55]; + uint32_t icciidr; +#define GIC_CPUIF_ICCIIDR_PRODUCT_ID(val) BSP_FLD32(val, 24, 31) +#define GIC_CPUIF_ICCIIDR_PRODUCT_ID_GET(reg) BSP_FLD32GET(reg, 24, 31) +#define GIC_CPUIF_ICCIIDR_PRODUCT_ID_SET(reg, val) BSP_FLD32SET(reg, val, 24, 31) +#define GIC_CPUIF_ICCIIDR_ARCH_VERSION(val) BSP_FLD32(val, 16, 19) +#define GIC_CPUIF_ICCIIDR_ARCH_VERSION_GET(reg) BSP_FLD32GET(reg, 16, 19) +#define GIC_CPUIF_ICCIIDR_ARCH_VERSION_SET(reg, val) BSP_FLD32SET(reg, val, 16, 19) +#define GIC_CPUIF_ICCIIDR_REVISION(val) BSP_FLD32(val, 12, 15) +#define GIC_CPUIF_ICCIIDR_REVISION_GET(reg) BSP_FLD32GET(reg, 12, 15) +#define GIC_CPUIF_ICCIIDR_REVISION_SET(reg, val) BSP_FLD32SET(reg, val, 12, 15) +#define GIC_CPUIF_ICCIIDR_IMPLEMENTER(val) BSP_FLD32(val, 0, 11) +#define GIC_CPUIF_ICCIIDR_IMPLEMENTER_GET(reg) BSP_FLD32GET(reg, 0, 11) +#define GIC_CPUIF_ICCIIDR_IMPLEMENTER_SET(reg, val) BSP_FLD32SET(reg, val, 0, 11) +} gic_cpuif; + +typedef struct { + uint32_t icddcr; +#define GIC_DIST_ICDDCR_ENABLE BSP_BIT32(0) + uint32_t icdictr; +#define GIC_DIST_ICDICTR_LSPI(val) BSP_FLD32(val, 11, 15) +#define GIC_DIST_ICDICTR_LSPI_GET(reg) BSP_FLD32GET(reg, 11, 15) +#define GIC_DIST_ICDICTR_LSPI_SET(reg, val) BSP_FLD32SET(reg, val, 11, 15) +#define GIC_DIST_ICDICTR_SECURITY_EXTN BSP_BIT32(10) +#define GIC_DIST_ICDICTR_CPU_NUMBER(val) BSP_FLD32(val, 5, 7) +#define GIC_DIST_ICDICTR_CPU_NUMBER_GET(reg) BSP_FLD32GET(reg, 5, 7) +#define GIC_DIST_ICDICTR_CPU_NUMBER_SET(reg, val) BSP_FLD32SET(reg, val, 5, 7) +#define GIC_DIST_ICDICTR_IT_LINES_NUMBER(val) BSP_FLD32(val, 0, 4) +#define GIC_DIST_ICDICTR_IT_LINES_NUMBER_GET(reg) BSP_FLD32GET(reg, 0, 4) +#define GIC_DIST_ICDICTR_IT_LINES_NUMBER_SET(reg, val) BSP_FLD32SET(reg, val, 0, 4) + uint32_t icdiidr; +#define GIC_DIST_ICDIIDR_PRODUCT_ID(val) BSP_FLD32(val, 24, 31) +#define GIC_DIST_ICDIIDR_PRODUCT_ID_GET(reg) BSP_FLD32GET(reg, 24, 31) +#define GIC_DIST_ICDIIDR_PRODUCT_ID_SET(reg, val) BSP_FLD32SET(reg, val, 24, 31) +#define GIC_DIST_ICDIIDR_VARIANT(val) BSP_FLD32(val, 16, 19) +#define GIC_DIST_ICDIIDR_VARIANT_GET(reg) BSP_FLD32GET(reg, 16, 19) +#define GIC_DIST_ICDIIDR_VARIANT_SET(reg, val) BSP_FLD32SET(reg, val, 16, 19) +#define GIC_DIST_ICDIIDR_REVISION(val) BSP_FLD32(val, 12, 15) +#define GIC_DIST_ICDIIDR_REVISION_GET(reg) BSP_FLD32GET(reg, 12, 15) +#define GIC_DIST_ICDIIDR_REVISION_SET(reg, val) BSP_FLD32SET(reg, val, 12, 15) +#define GIC_DIST_ICDIIDR_IMPLEMENTER(val) BSP_FLD32(val, 0, 11) +#define GIC_DIST_ICDIIDR_IMPLEMENTER_GET(reg) BSP_FLD32GET(reg, 0, 11) +#define GIC_DIST_ICDIIDR_IMPLEMENTER_SET(reg, val) BSP_FLD32SET(reg, val, 0, 11) + uint32_t reserved_0c[29]; + uint32_t icdisr[32]; + uint32_t icdiser[32]; + uint32_t icdicer[32]; + uint32_t icdispr[32]; + uint32_t icdicpr[32]; + uint32_t icdabr[32]; + uint32_t reserved_380[32]; + uint8_t icdipr[256]; + uint32_t reserved_500[192]; + uint8_t icdiptr[256]; + uint32_t reserved_900[192]; + uint32_t icdicfr[64]; + uint32_t reserved_d00[128]; + uint32_t icdsgir; +#define GIC_DIST_ICDSGIR_TARGET_LIST_FILTER(val) BSP_FLD32(val, 24, 25) +#define GIC_DIST_ICDSGIR_TARGET_LIST_FILTER_GET(reg) BSP_FLD32GET(reg, 24, 25) +#define GIC_DIST_ICDSGIR_TARGET_LIST_FILTER_SET(reg, val) BSP_FLD32SET(reg, val, 24, 25) +#define GIC_DIST_ICDSGIR_CPU_TARGET_LIST(val) BSP_FLD32(val, 16, 23) +#define GIC_DIST_ICDSGIR_CPU_TARGET_LIST_GET(reg) BSP_FLD32GET(reg, 16, 23) +#define GIC_DIST_ICDSGIR_CPU_TARGET_LIST_SET(reg, val) BSP_FLD32SET(reg, val, 16, 23) +#define GIC_DIST_ICDSGIR_SATT BSP_BIT32(15) +#define GIC_DIST_ICDSGIR_SGIINTID(val) BSP_FLD32(val, 0, 3) +#define GIC_DIST_ICDSGIR_SGIINTID_GET(reg) BSP_FLD32GET(reg, 0, 3) +#define GIC_DIST_ICDSGIR_SGIINTID_SET(reg, val) BSP_FLD32SET(reg, val, 0, 3) +} gic_dist; + +#endif /* LIBBSP_ARM_SHARED_ARM_GIC_REGS_H */ diff --git a/c/src/lib/libbsp/arm/shared/include/arm-gic.h b/c/src/lib/libbsp/arm/shared/include/arm-gic.h new file mode 100644 index 0000000000..ff5eee5cde --- /dev/null +++ b/c/src/lib/libbsp/arm/shared/include/arm-gic.h @@ -0,0 +1,190 @@ +/* + * Copyright (c) 2013 embedded brains GmbH. All rights reserved. + * + * embedded brains GmbH + * Dornierstr. 4 + * 82178 Puchheim + * Germany + * <info@embedded-brains.de> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.com/license/LICENSE. + */ + +#ifndef LIBBSP_ARM_SHARED_ARM_GIC_H +#define LIBBSP_ARM_SHARED_ARM_GIC_H + +#include <bsp/arm-gic-regs.h> + +#include <stdbool.h> + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +#define GIC_ID_TO_ONE_BIT_REG_INDEX(id) ((id) >> 5) +#define GIC_ID_TO_ONE_BIT_REG_BIT(id) (1U << ((id) & 0x1fU)) + +#define GIC_ID_TO_TWO_BITS_REG_INDEX(id) ((id) >> 4) +#define GIC_ID_TO_TWO_BITS_REG_OFFSET(id) ((id) & 0xfU) + +static inline bool gic_id_is_enabled(volatile gic_dist *dist, uint32_t id) +{ + uint32_t i = GIC_ID_TO_ONE_BIT_REG_INDEX(id); + uint32_t bit = GIC_ID_TO_ONE_BIT_REG_BIT(id); + + return (dist->icdiser[i] & bit) != 0; +} + +static inline void gic_id_enable(volatile gic_dist *dist, uint32_t id) +{ + uint32_t i = GIC_ID_TO_ONE_BIT_REG_INDEX(id); + uint32_t bit = GIC_ID_TO_ONE_BIT_REG_BIT(id); + + dist->icdiser[i] = bit; +} + +static inline void gic_id_disable(volatile gic_dist *dist, uint32_t id) +{ + uint32_t i = GIC_ID_TO_ONE_BIT_REG_INDEX(id); + uint32_t bit = GIC_ID_TO_ONE_BIT_REG_BIT(id); + + dist->icdicer[i] = bit; +} + +static inline bool gic_id_is_pending(volatile gic_dist *dist, uint32_t id) +{ + uint32_t i = GIC_ID_TO_ONE_BIT_REG_INDEX(id); + uint32_t bit = GIC_ID_TO_ONE_BIT_REG_BIT(id); + + return (dist->icdispr[i] & bit) != 0; +} + +static inline void gic_id_set_pending(volatile gic_dist *dist, uint32_t id) +{ + uint32_t i = GIC_ID_TO_ONE_BIT_REG_INDEX(id); + uint32_t bit = GIC_ID_TO_ONE_BIT_REG_BIT(id); + + dist->icdispr[i] = bit; +} + +static inline void gic_id_clear_pending(volatile gic_dist *dist, uint32_t id) +{ + uint32_t i = GIC_ID_TO_ONE_BIT_REG_INDEX(id); + uint32_t bit = GIC_ID_TO_ONE_BIT_REG_BIT(id); + + dist->icdicpr[i] = bit; +} + +static inline bool gic_id_is_active(volatile gic_dist *dist, uint32_t id) +{ + uint32_t i = GIC_ID_TO_ONE_BIT_REG_INDEX(id); + uint32_t bit = GIC_ID_TO_ONE_BIT_REG_BIT(id); + + return (dist->icdabr[i] & bit) != 0; +} + +static inline void gic_id_set_priority( + volatile gic_dist *dist, + uint32_t id, + uint8_t priority +) +{ + dist->icdipr[id] = priority; +} + +static inline uint8_t gic_id_get_priority(volatile gic_dist *dist, uint32_t id) +{ + return dist->icdipr[id]; +} + +static inline void gic_id_set_targets( + volatile gic_dist *dist, + uint32_t id, + uint8_t targets +) +{ + dist->icdiptr[id] = targets; +} + +static inline uint8_t gic_id_get_targets(volatile gic_dist *dist, uint32_t id) +{ + return dist->icdiptr[id]; +} + +typedef enum { + GIC_LEVEL_SENSITIVE, + GIC_EDGE_TRIGGERED +} gic_trigger_mode; + +static inline gic_trigger_mode gic_id_get_trigger_mode( + volatile gic_dist *dist, + uint32_t id +) +{ + uint32_t i = GIC_ID_TO_TWO_BITS_REG_INDEX(id); + uint32_t o = GIC_ID_TO_TWO_BITS_REG_OFFSET(id) + 1; + uint32_t bit = 1U << o; + + return dist->icdicfr[i] & bit; +} + +static inline void gic_id_set_trigger_mode( + volatile gic_dist *dist, + uint32_t id, + gic_trigger_mode mode +) +{ + uint32_t i = GIC_ID_TO_TWO_BITS_REG_INDEX(id); + uint32_t o = GIC_ID_TO_TWO_BITS_REG_OFFSET(id) + 1; + uint32_t bit = mode << o; + uint32_t mask = 1U << o; + uint32_t icdicfr = dist->icdicfr[i]; + + icdicfr &= ~mask; + icdicfr |= bit; + + dist->icdicfr[i] = icdicfr; +} + +typedef enum { + GIC_N_TO_N, + GIC_1_TO_N +} gic_handling_model; + +static inline gic_handling_model gic_id_get_handling_model( + volatile gic_dist *dist, + uint32_t id +) +{ + uint32_t i = GIC_ID_TO_TWO_BITS_REG_INDEX(id); + uint32_t o = GIC_ID_TO_TWO_BITS_REG_OFFSET(id); + uint32_t bit = 1U << o; + + return dist->icdicfr[i] & bit; +} + +static inline void gic_id_set_handling_model( + volatile gic_dist *dist, + uint32_t id, + gic_handling_model model +) +{ + uint32_t i = GIC_ID_TO_TWO_BITS_REG_INDEX(id); + uint32_t o = GIC_ID_TO_TWO_BITS_REG_OFFSET(id); + uint32_t bit = model << o; + uint32_t mask = 1U << o; + uint32_t icdicfr = dist->icdicfr[i]; + + icdicfr &= ~mask; + icdicfr |= bit; + + dist->icdicfr[i] = icdicfr; +} + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* LIBBSP_ARM_SHARED_ARM_GIC_H */ diff --git a/c/src/lib/libbsp/arm/shared/include/arm-pl011-regs.h b/c/src/lib/libbsp/arm/shared/include/arm-pl011-regs.h new file mode 100644 index 0000000000..0b0bd1f081 --- /dev/null +++ b/c/src/lib/libbsp/arm/shared/include/arm-pl011-regs.h @@ -0,0 +1,122 @@ +/* + * Copyright (c) 2013 embedded brains GmbH. All rights reserved. + * + * embedded brains GmbH + * Dornierstr. 4 + * 82178 Puchheim + * Germany + * <info@embedded-brains.de> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.com/license/LICENSE. + */ + +#ifndef LIBBSP_ARM_SHARED_ARM_PL011_REGS_H +#define LIBBSP_ARM_SHARED_ARM_PL011_REGS_H + +#include <bsp/utility.h> + +typedef struct { + uint32_t uartdr; +#define PL011_UARTDR_OE BSP_BIT32(11) +#define PL011_UARTDR_BE BSP_BIT32(10) +#define PL011_UARTDR_PE BSP_BIT32(9) +#define PL011_UARTDR_FE BSP_BIT32(8) +#define PL011_UARTDR_DATA(val) BSP_FLD32(val, 0, 7) +#define PL011_UARTDR_DATA_GET(reg) BSP_FLD32GET(reg, 0, 7) +#define PL011_UARTDR_DATA_SET(reg, val) BSP_FLD32SET(reg, val, 0, 7) + uint32_t uartrsr_uartecr; +#define PL011_UARTRSR_UARTECR_OE BSP_BIT32(3) +#define PL011_UARTRSR_UARTECR_BE BSP_BIT32(2) +#define PL011_UARTRSR_UARTECR_PE BSP_BIT32(1) +#define PL011_UARTRSR_UARTECR_FE BSP_BIT32(0) + uint32_t reserved_08[4]; + uint32_t uartfr; +#define PL011_UARTFR_RI BSP_BIT32(8) +#define PL011_UARTFR_TXFE BSP_BIT32(7) +#define PL011_UARTFR_RXFF BSP_BIT32(6) +#define PL011_UARTFR_TXFF BSP_BIT32(5) +#define PL011_UARTFR_RXFE BSP_BIT32(4) +#define PL011_UARTFR_BUSY BSP_BIT32(3) +#define PL011_UARTFR_DCD BSP_BIT32(2) +#define PL011_UARTFR_DSR BSP_BIT32(1) +#define PL011_UARTFR_CTS BSP_BIT32(0) + uint32_t reserved_1c; + uint32_t uartilpr; +#define PL011_UARTILPR_ILPDVSR(val) BSP_FLD32(val, 0, 7) +#define PL011_UARTILPR_ILPDVSR_GET(reg) BSP_FLD32GET(reg, 0, 7) +#define PL011_UARTILPR_ILPDVSR_SET(reg, val) BSP_FLD32SET(reg, val, 0, 7) + uint32_t uartibrd; +#define PL011_UARTIBRD_BAUD_DIVINT(val) BSP_FLD32(val, 0, 15) +#define PL011_UARTIBRD_BAUD_DIVINT_GET(reg) BSP_FLD32GET(reg, 0, 15) +#define PL011_UARTIBRD_BAUD_DIVINT_SET(reg, val) BSP_FLD32SET(reg, val, 0, 15) + uint32_t uartfbrd; +#define PL011_UARTFBRD_BAUD_DIVFRAC(val) BSP_FLD32(val, 0, 5) +#define PL011_UARTFBRD_BAUD_DIVFRAC_GET(reg) BSP_FLD32GET(reg, 0, 5) +#define PL011_UARTFBRD_BAUD_DIVFRAC_SET(reg, val) BSP_FLD32SET(reg, val, 0, 5) + uint32_t uartlcr_h; +#define PL011_UARTLCR_H_SPS BSP_BIT32(7) +#define PL011_UARTLCR_H_WLEN(val) BSP_FLD32(val, 5, 6) +#define PL011_UARTLCR_H_WLEN_GET(reg) BSP_FLD32GET(reg, 5, 6) +#define PL011_UARTLCR_H_WLEN_SET(reg, val) BSP_FLD32SET(reg, val, 5, 6) +#define PL011_UARTLCR_H_WLEN_5 0x00U +#define PL011_UARTLCR_H_WLEN_6 0x01U +#define PL011_UARTLCR_H_WLEN_7 0x02U +#define PL011_UARTLCR_H_WLEN_8 0x03U +#define PL011_UARTLCR_H_FEN BSP_BIT32(4) +#define PL011_UARTLCR_H_STP2 BSP_BIT32(3) +#define PL011_UARTLCR_H_EPS BSP_BIT32(2) +#define PL011_UARTLCR_H_PEN BSP_BIT32(1) +#define PL011_UARTLCR_H_BRK BSP_BIT32(0) + uint32_t uartcr; +#define PL011_UARTCR_CTSEN BSP_BIT32(15) +#define PL011_UARTCR_RTSEN BSP_BIT32(14) +#define PL011_UARTCR_OUT2 BSP_BIT32(13) +#define PL011_UARTCR_OUT1 BSP_BIT32(12) +#define PL011_UARTCR_RTS BSP_BIT32(11) +#define PL011_UARTCR_DTR BSP_BIT32(10) +#define PL011_UARTCR_RXE BSP_BIT32(9) +#define PL011_UARTCR_TXE BSP_BIT32(8) +#define PL011_UARTCR_LBE BSP_BIT32(7) +#define PL011_UARTCR_SIRLP BSP_BIT32(3) +#define PL011_UARTCR_SIREN BSP_BIT32(2) +#define PL011_UARTCR_UARTEN BSP_BIT32(1) + uint32_t uartifls; +#define PL011_UARTIFLS_RXIFLSEL(val) BSP_FLD32(val, 3, 5) +#define PL011_UARTIFLS_RXIFLSEL_GET(reg) BSP_FLD32GET(reg, 3, 5) +#define PL011_UARTIFLS_RXIFLSEL_SET(reg, val) BSP_FLD32SET(reg, val, 3, 5) +#define PL011_UARTIFLS_TXIFLSEL(val) BSP_FLD32(val, 0, 2) +#define PL011_UARTIFLS_TXIFLSEL_GET(reg) BSP_FLD32GET(reg, 0, 2) +#define PL011_UARTIFLS_TXIFLSEL_SET(reg, val) BSP_FLD32SET(reg, val, 0, 2) + uint32_t uartimsc; + uint32_t uartris; + uint32_t uartmis; + uint32_t uarticr; +#define PL011_UARTI_OEI BSP_BIT32(10) +#define PL011_UARTI_BEI BSP_BIT32(9) +#define PL011_UARTI_PEI BSP_BIT32(8) +#define PL011_UARTI_FEI BSP_BIT32(7) +#define PL011_UARTI_RTI BSP_BIT32(6) +#define PL011_UARTI_TXI BSP_BIT32(5) +#define PL011_UARTI_RXI BSP_BIT32(4) +#define PL011_UARTI_DSRMI BSP_BIT32(3) +#define PL011_UARTI_DCDMI BSP_BIT32(2) +#define PL011_UARTI_CTSMI BSP_BIT32(1) +#define PL011_UARTI_RIMI BSP_BIT32(0) + uint32_t uartdmacr; +#define PL011_UARTDMACR_DMAONERR BSP_BIT32(2) +#define PL011_UARTDMACR_TXDMAE BSP_BIT32(1) +#define PL011_UARTDMACR_RXDMAE BSP_BIT32(0) + uint32_t reserved_4c[997]; + uint32_t uartperiphid0; + uint32_t uartperiphid1; + uint32_t uartperiphid2; + uint32_t uartperiphid3; + uint32_t uartpcellid0; + uint32_t uartpcellid1; + uint32_t uartpcellid2; + uint32_t uartpcellid3; +} pl011; + +#endif /* LIBBSP_ARM_SHARED_ARM_PL011_REGS_H */ diff --git a/c/src/lib/libbsp/arm/shared/include/arm-pl011.h b/c/src/lib/libbsp/arm/shared/include/arm-pl011.h new file mode 100644 index 0000000000..537e382a9a --- /dev/null +++ b/c/src/lib/libbsp/arm/shared/include/arm-pl011.h @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2013 embedded brains GmbH. All rights reserved. + * + * embedded brains GmbH + * Dornierstr. 4 + * 82178 Puchheim + * Germany + * <info@embedded-brains.de> + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.com/license/LICENSE. + */ + +#ifndef LIBBSP_ARM_SHARED_ARM_PL011_H +#define LIBBSP_ARM_SHARED_ARM_PL011_H + +#include <libchip/serial.h> + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +extern const console_fns arm_pl011_fns; + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* LIBBSP_ARM_SHARED_ARM_PL011_H */ |