diff options
-rw-r--r-- | c/src/lib/libcpu/powerpc/rtems/powerpc/powerpc.h | 10 | ||||
-rw-r--r-- | cpukit/score/cpu/powerpc/rtems/score/cpu.h | 2 | ||||
-rw-r--r-- | cpukit/score/cpu/powerpc/rtems/score/powerpc.h | 5 |
3 files changed, 6 insertions, 11 deletions
diff --git a/c/src/lib/libcpu/powerpc/rtems/powerpc/powerpc.h b/c/src/lib/libcpu/powerpc/rtems/powerpc/powerpc.h index 2a895e1201..8934585a92 100644 --- a/c/src/lib/libcpu/powerpc/rtems/powerpc/powerpc.h +++ b/c/src/lib/libcpu/powerpc/rtems/powerpc/powerpc.h @@ -78,7 +78,7 @@ extern "C" { * unless specifically set by the model definition: * * + PPC_INTERRUPT_MAX - 16 - * + PPC_CACHE_ALIGNMENT - 32 + * + PPC_CACHE_ALIGNMENT * + PPC_LOW_POWER_MODE - PPC_LOW_POWER_MODE_NONE * + PPC_HAS_EXCEPTION_PREFIX - 1 * + PPC_USE_MULTIPLE - 0 @@ -293,14 +293,8 @@ extern "C" { #define PPC_INTERRUPT_MAX 16 #endif -/* - * Unless specified otherwise, the cache line size is defaulted to 32. - * - * The derive the power of 2 the cache line is. - */ - #ifndef PPC_CACHE_ALIGNMENT -#define PPC_CACHE_ALIGNMENT 32 +#define PPC_CACHE_ALIGNMENT PPC_DEFAULT_CACHE_LINE_SIZE #endif #if (PPC_CACHE_ALIGNMENT == 16) diff --git a/cpukit/score/cpu/powerpc/rtems/score/cpu.h b/cpukit/score/cpu/powerpc/rtems/score/cpu.h index e53cfbc7cc..889ecdf696 100644 --- a/cpukit/score/cpu/powerpc/rtems/score/cpu.h +++ b/cpukit/score/cpu/powerpc/rtems/score/cpu.h @@ -265,8 +265,6 @@ extern "C" { #define PPC_GPR_STORE evstdd #endif -#define PPC_DEFAULT_CACHE_LINE_SIZE 32 - #ifndef ASM typedef struct { diff --git a/cpukit/score/cpu/powerpc/rtems/score/powerpc.h b/cpukit/score/cpu/powerpc/rtems/score/powerpc.h index 4a7b3aa6af..ee5484bc63 100644 --- a/cpukit/score/cpu/powerpc/rtems/score/powerpc.h +++ b/cpukit/score/cpu/powerpc/rtems/score/powerpc.h @@ -73,7 +73,10 @@ extern "C" { #endif #define PPC_ALIGNMENT 8 -#define PPC_STRUCTURE_ALIGNMENT 32 + +#define PPC_DEFAULT_CACHE_LINE_SIZE 32 + +#define PPC_STRUCTURE_ALIGNMENT PPC_DEFAULT_CACHE_LINE_SIZE /* * Application binary interfaces. |