summaryrefslogtreecommitdiffstats
path: root/tools/cpu/nios2/bridges.c
diff options
context:
space:
mode:
authorRalf Corsepius <ralf.corsepius@rtems.org>2009-12-10 07:20:06 +0000
committerRalf Corsepius <ralf.corsepius@rtems.org>2009-12-10 07:20:06 +0000
commit5f5f681b69f255f6b94e54fa73978e5f9644108c (patch)
tree4f06c116d69c70cf2578829e844f44025882775c /tools/cpu/nios2/bridges.c
parent2009-12-10 Ralf Cors├ępius <ralf.corsepius@rtems.org> (diff)
downloadrtems-5f5f681b69f255f6b94e54fa73978e5f9644108c.tar.bz2
Whitespace removal.
Diffstat (limited to '')
-rw-r--r--tools/cpu/nios2/bridges.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/tools/cpu/nios2/bridges.c b/tools/cpu/nios2/bridges.c
index e5f36e07c4..be5e889b5e 100644
--- a/tools/cpu/nios2/bridges.c
+++ b/tools/cpu/nios2/bridges.c
@@ -12,7 +12,7 @@
/* Find bus bridges */
/* This part of the program builds a list with pairs of bus
- master port names (each is "device name/master port name").
+ master port names (each is "device name/master port name").
It is then possible to find if a given master is actually
available under a different master port name through bridges.
*/
@@ -21,7 +21,7 @@
tristate_bridge_0/tristate_master, and
tristate_bridge_0 itself is slave of cpu0/data_master, the
bridge information would be stored as this bus_bridge_pair:
- mastered_by = "cpu0/data_master" and
+ mastered_by = "cpu0/data_master" and
bridges_to = "tristate_bridge_0/tristate_master".
That allows to deduce that SRAM is actually mastered by
cpu0/data_master. If there were any address or bus width
@@ -36,8 +36,8 @@
#include "bridges.h"
int is_bridged(
- char *cpu_master,
- char *dev_master,
+ char *cpu_master,
+ char *dev_master,
bus_bridge_pair *bridges)
{
char *curr_master;
@@ -47,7 +47,7 @@ int is_bridged(
for(bbp = bridges; bbp != NULL; bbp=bbp->next)
{
- if(strcmp(cpu_master, bbp->mastered_by) == 0 &&
+ if(strcmp(cpu_master, bbp->mastered_by) == 0 &&
is_bridged(bbp->bridges_to, dev_master, bridges))
{
return 1; /* cpu masters dev via bridge */