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| author | Daniel Cederman <cederman@gaisler.com> | 2014-09-11 17:55:34 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-09-16 10:29:42 +0200 |
| commit | 6e1206ab46e22f1c13253bb367c095791eebf41d (patch) | |
| tree | 4fe5301696bae3a3422c3b0f3c3561c850dd8ec4 /testsuites/smptests/smpcache01/smpcache01.scn | |
| parent | doc: Sort the shell file commands into alphabetical order. (diff) | |
| download | rtems-6e1206ab46e22f1c13253bb367c095791eebf41d.tar.bz2 | |
smptests/smpcache01: Remove invalidation of data cache lines from test
Invalidation of entire data cache might cause data written to the stack
to get lost.
Diffstat (limited to '')
| -rw-r--r-- | testsuites/smptests/smpcache01/smpcache01.scn | 18 |
1 files changed, 6 insertions, 12 deletions
diff --git a/testsuites/smptests/smpcache01/smpcache01.scn b/testsuites/smptests/smpcache01/smpcache01.scn index 5964d3eb3e..c93e2c558f 100644 --- a/testsuites/smptests/smpcache01/smpcache01.scn +++ b/testsuites/smptests/smpcache01/smpcache01.scn @@ -1,14 +1,8 @@ *** BEGIN OF TEST SMPCACHE 1 *** -Calling all standard SMP cache functions -Done! -Calling all standard SMP cache functions. With ISR disabled -Done! -Calling all standard SMP cache functions. With CPU0 holding the giant lock -Done! -Calling a test function using the SMP cache manager to verify that all CPUs receive the SMP message -Done! -Calling a test function using the SMP cache manager to verify that all CPUs receive the SMP message. With ISR disabled -Done! -Calling a test function using the SMP cache manager to verify that all CPUs receive the SMP message. With CPU0 holding the giant lock -Done! +Calling standard SMP cache functions. Done! +Calling standard SMP cache functions with ISR disabled. Done! +Calling standard SMP cache functions with CPU0 holding the giant lock. Done! +Calling a test function using the SMP cache manager to verify that all CPUs receive the SMP message. Done! +Calling a test function using the SMP cache manager to verify that all CPUs receive the SMP message. With ISR disabled. Done! +Calling a test function using the SMP cache manager to verify that all CPUs receive the SMP message. With CPU0 holding the giant lock. Done! *** END OF TEST SMPCACHE 1 *** |