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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2021-07-19 11:06:09 +0200 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2023-07-14 12:21:33 +0200 |
commit | 314945468c84c5e1a6074595ca6ecf1dbc3a56da (patch) | |
tree | 2947c62548af575c308f3758a630b31206bebba8 /spec/build/bsps/sparc/leon3/optl2cachebase.yml | |
parent | bsp/leon3: Add LEON3_HAS_ASR_22_23_UP_COUNTER (diff) | |
download | rtems-314945468c84c5e1a6074595ca6ecf1dbc3a56da.tar.bz2 |
bsp/leon3: Add LEON3_L2CACHE_BASE
Diffstat (limited to '')
-rw-r--r-- | spec/build/bsps/sparc/leon3/optl2cachebase.yml | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/spec/build/bsps/sparc/leon3/optl2cachebase.yml b/spec/build/bsps/sparc/leon3/optl2cachebase.yml new file mode 100644 index 0000000000..759198f827 --- /dev/null +++ b/spec/build/bsps/sparc/leon3/optl2cachebase.yml @@ -0,0 +1,19 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +copyrights: +- Copyright (C) 2021 embedded brains GmbH & Co. KG +actions: +- get-integer: null +- format-and-define: null +build-type: option +default: +- enabled-by: sparc/gr712rc + value: 0x00000000 +- enabled-by: sparc/gr740 + value: 0xf0000000 +enabled-by: true +format: '{:#010x}' +links: [] +name: LEON3_L2CACHE_BASE +description: | + This option defines the base address of the L2CACHE register block. +type: build |