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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2023-09-15 16:20:47 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2023-10-20 11:20:14 +0200 |
| commit | 958d517215025851fd728abdc1f246c9ad808dab (patch) | |
| tree | 3b9978ee3b655537be1bec85751c9ec81cbd2b49 /spec/build/bsps/sparc/leon3/optdsubase.yml | |
| parent | bsps/leon3: leon3_counter_use_irqamp_timestamp() (diff) | |
| download | rtems-958d517215025851fd728abdc1f246c9ad808dab.tar.bz2 | |
bsps/leon3: Use DSU time tag for GR712RC
Close #4954.
Diffstat (limited to '')
| -rw-r--r-- | spec/build/bsps/sparc/leon3/optdsubase.yml | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/spec/build/bsps/sparc/leon3/optdsubase.yml b/spec/build/bsps/sparc/leon3/optdsubase.yml new file mode 100644 index 0000000000..5fd0b9bfb7 --- /dev/null +++ b/spec/build/bsps/sparc/leon3/optdsubase.yml @@ -0,0 +1,24 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +copyrights: +- Copyright (C) 2023 embedded brains GmbH & Co. KG +actions: +- get-integer: null +- format-and-define: null +build-type: option +default: +- enabled-by: sparc/gr712rc + value: 0x90000000 +enabled-by: true +format: '{:#010x}' +links: [] +name: LEON3_DSU_BASE +description: | + This option defines the base address of the DSU register block used by + the clock driver and CPU counter implementation. + + In general, using the Debug Support Unit (DSU) is not recommended for the + clock driver and CPU counter implementation. Before you use it, check that + it is available in flight models and that the time tag register is + implemented in radiation hardened flip-flops. For the GR712RC, this is the + case. +type: build |