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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2019-07-19 13:09:43 +0200 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2020-09-14 07:11:32 +0200 |
commit | f3f0370f1054f4e49aa8f5ea70485d673e8e94b6 (patch) | |
tree | 11d44920353aea9bf4301eb267f8c831e622520e /spec/build/bsps/powerpc/gen5200/optgpioval.yml | |
parent | i386/score: fix assembly mnemonic (diff) | |
download | rtems-f3f0370f1054f4e49aa8f5ea70485d673e8e94b6.tar.bz2 |
build: Alternative build system based on waf
Update #3818.
Diffstat (limited to '')
-rw-r--r-- | spec/build/bsps/powerpc/gen5200/optgpioval.yml | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/spec/build/bsps/powerpc/gen5200/optgpioval.yml b/spec/build/bsps/powerpc/gen5200/optgpioval.yml new file mode 100644 index 0000000000..029df6a4f7 --- /dev/null +++ b/spec/build/bsps/powerpc/gen5200/optgpioval.yml @@ -0,0 +1,22 @@ +SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause +actions: +- get-integer: null +- define: null +build-type: option +copyrights: +- Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de) +default: 17105988 +default-by-variant: +- value: 22356228 + variants: + - powerpc/pm520_ze30 +description: | + Defines the bits set in the MPC5200 GPIOPCR register during initialization. + Must match the hardware requirements. Must be consistent with + BSP_GPIOPCR_INITMASK. The bits are cleared via BSP_GPIOPCR_INITMASK and then + set via BSP_GPIOPCR_INITVAL. +enabled-by: true +format: '{:#010x}' +links: [] +name: BSP_GPIOPCR_INITVAL +type: build |