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authorSebastian Huber <sebastian.huber@embedded-brains.de>2020-12-22 13:00:27 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2020-12-23 09:24:49 +0100
commit9f3a08ef2de99714d679aecf6b1ecb4e11869424 (patch)
tree0d876016ae1dd067b1815dd79715cc7edc752f1e /spec/build/bsps/arm/xilinx-zynq/obj.yml
parentbsps/arm: Invalidate TLB in start.S (diff)
downloadrtems-9f3a08ef2de99714d679aecf6b1ecb4e11869424.tar.bz2
bsps: Use header file for GIC architecture support
This avoids a function call overhead in the interrupt dispatching. Update #4202.
Diffstat (limited to '')
-rw-r--r--spec/build/bsps/arm/xilinx-zynq/obj.yml1
1 files changed, 0 insertions, 1 deletions
diff --git a/spec/build/bsps/arm/xilinx-zynq/obj.yml b/spec/build/bsps/arm/xilinx-zynq/obj.yml
index c2dde615b8..6602b20a03 100644
--- a/spec/build/bsps/arm/xilinx-zynq/obj.yml
+++ b/spec/build/bsps/arm/xilinx-zynq/obj.yml
@@ -25,7 +25,6 @@ source:
- bsps/arm/shared/cp15/arm-cp15-set-exception-handler.c
- bsps/arm/shared/cp15/arm-cp15-set-ttb-entries.c
- bsps/shared/dev/irq/arm-gicv2.c
-- bsps/arm/shared/irq/irq-arm-gicvx-aarch32.c
- bsps/arm/shared/start/bsp-start-memcpy.S
- bsps/arm/xilinx-zynq/console/console-config.c
- bsps/arm/xilinx-zynq/console/console-init.c