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authorStephen Clark <stephen.clark@oarcorp.com>2021-08-23 12:58:47 -0500
committerJoel Sherrill <joel@rtems.org>2021-09-09 14:19:57 -0500
commit7792ab88ca300b167a6b64f48afc039da88f4d93 (patch)
treef457f0020af2dec07cde420f72460700026329dc /spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c1.yml
parentbsps/zynq: Moved general i2c files to shared directories (diff)
downloadrtems-7792ab88ca300b167a6b64f48afc039da88f4d93.tar.bz2
bsps/zynqmp: Added I2C support for ZynqMP
Added I2C drivers for ZynqMP and updated build system accordingly.
Diffstat (limited to '')
-rw-r--r--spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c1.yml31
1 files changed, 31 insertions, 0 deletions
diff --git a/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c1.yml b/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c1.yml
new file mode 100644
index 0000000000..0431a7fac7
--- /dev/null
+++ b/spec/build/bsps/aarch64/xilinx-zynqmp/optclki2c1.yml
@@ -0,0 +1,31 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-integer: null
+- define: null
+build-type: option
+copyrights: |
+ Copyright (C) 2021 On-Line Applications Research (OAR)
+ Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
+default: 111111111
+default-by-family: []
+default-by-variant:
+- value: 111111111
+ variants:
+ - aarch64/xilinx_zynqmp_ilp32_qemu.*
+- value: 111111111
+ variants:
+ - aarch64/xilinx_zynqmp_ilp32_zu3eg.*
+- value: 111111111
+ variants:
+ - aarch64/xilinx_zynqmp_lp64_qemu.*
+- value: 111111111
+ variants:
+ - aarch64/xilinx_zynqmp_lp64_zu3eg.*
+description: |
+ ZynqMP i2c1 clock frequency in Hz. This is the frequency after the signal
+ has been processed using the values passed to the I2C1_REF_CTRL register.
+enabled-by: true
+format: '{}'
+links: []
+name: ZYNQMP_CLOCK_I2C1
+type: build