summaryrefslogtreecommitdiffstats
path: root/spec/build/bsps/aarch64/xilinx-zynqmp/linkcmds_lp64.yml
diff options
context:
space:
mode:
authorKinsey Moore <kinsey.moore@oarcorp.com>2022-07-05 13:35:28 -0500
committerJoel Sherrill <joel@rtems.org>2022-07-06 10:22:08 -0500
commit2f6ee01e9ebd2776d36e12bf93c11cefd4274a8e (patch)
treececbdccc485e0e55b117fc9cd345ea3f29c37820 /spec/build/bsps/aarch64/xilinx-zynqmp/linkcmds_lp64.yml
parentcpukit/aarch64: Remove _CPU_ISR_install_vector (diff)
downloadrtems-2f6ee01e9ebd2776d36e12bf93c11cefd4274a8e.tar.bz2
bsps/aarch64: Use MMU pages appropriately
There were two bugs with MMU page use that were partially hiding each other. The linker script page table section was 4x the size it needed to be and the page table allocation routine was allocating pages PTRSIZE times larger than it needed to. On ILP32, this resulted in incorrect but functional allocation. On LP64, this resulted in allocation failures earlier than expected.
Diffstat (limited to '')
-rw-r--r--spec/build/bsps/aarch64/xilinx-zynqmp/linkcmds_lp64.yml6
1 files changed, 3 insertions, 3 deletions
diff --git a/spec/build/bsps/aarch64/xilinx-zynqmp/linkcmds_lp64.yml b/spec/build/bsps/aarch64/xilinx-zynqmp/linkcmds_lp64.yml
index d9696be5d4..4a26c59944 100644
--- a/spec/build/bsps/aarch64/xilinx-zynqmp/linkcmds_lp64.yml
+++ b/spec/build/bsps/aarch64/xilinx-zynqmp/linkcmds_lp64.yml
@@ -30,9 +30,9 @@ content: |
*/
MEMORY {
- RAM : ORIGIN = ${BSP_XILINX_ZYNQMP_RAM_BASE} + ${BSP_XILINX_ZYNQMP_LOAD_OFFSET}, LENGTH = ${BSP_XILINX_ZYNQMP_RAM_LENGTH} - ${BSP_XILINX_ZYNQMP_LOAD_OFFSET} - ${BSP_XILINX_ZYNQMP_NOCACHE_LENGTH} - (0x4000 * ${AARCH64_MMU_TRANSLATION_TABLE_PAGES})
- NOCACHE : ORIGIN = ${BSP_XILINX_ZYNQMP_RAM_BASE} + ${BSP_XILINX_ZYNQMP_RAM_LENGTH} - (0x4000 * ${AARCH64_MMU_TRANSLATION_TABLE_PAGES}) - ${BSP_XILINX_ZYNQMP_NOCACHE_LENGTH}, LENGTH = ${BSP_XILINX_ZYNQMP_NOCACHE_LENGTH}
- RAM_MMU : ORIGIN = ${BSP_XILINX_ZYNQMP_RAM_BASE} + ${BSP_XILINX_ZYNQMP_RAM_LENGTH} - (0x4000 * ${AARCH64_MMU_TRANSLATION_TABLE_PAGES}), LENGTH = 0x4000 * ${AARCH64_MMU_TRANSLATION_TABLE_PAGES}
+ RAM : ORIGIN = ${BSP_XILINX_ZYNQMP_RAM_BASE} + ${BSP_XILINX_ZYNQMP_LOAD_OFFSET}, LENGTH = ${BSP_XILINX_ZYNQMP_RAM_LENGTH} - ${BSP_XILINX_ZYNQMP_LOAD_OFFSET} - ${BSP_XILINX_ZYNQMP_NOCACHE_LENGTH} - (0x1000 * ${AARCH64_MMU_TRANSLATION_TABLE_PAGES})
+ NOCACHE : ORIGIN = ${BSP_XILINX_ZYNQMP_RAM_BASE} + ${BSP_XILINX_ZYNQMP_RAM_LENGTH} - (0x1000 * ${AARCH64_MMU_TRANSLATION_TABLE_PAGES}) - ${BSP_XILINX_ZYNQMP_NOCACHE_LENGTH}, LENGTH = ${BSP_XILINX_ZYNQMP_NOCACHE_LENGTH}
+ RAM_MMU : ORIGIN = ${BSP_XILINX_ZYNQMP_RAM_BASE} + ${BSP_XILINX_ZYNQMP_RAM_LENGTH} - (0x1000 * ${AARCH64_MMU_TRANSLATION_TABLE_PAGES}), LENGTH = 0x1000 * ${AARCH64_MMU_TRANSLATION_TABLE_PAGES}
}
REGION_ALIAS ("REGION_START", RAM);