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authorChris Johns <chrisj@rtems.org>2022-08-22 13:47:07 +1000
committerChris Johns <chrisj@rtems.org>2022-08-23 07:55:25 +1000
commitdee5ea81479eed172b634506fd5ab91bb53e9982 (patch)
tree28a4fa992c8a56439cf3c8e86dcb6b12d85ab3f9 /spec/build/bsps/aarch64/xilinx-versal/bspvck190.yml
parentcpukit/include: Fix including in C++ (diff)
downloadrtems-dee5ea81479eed172b634506fd5ab91bb53e9982.tar.bz2
bsps/xilinx/versal: Remove IPL32 BSPs, add aiedge and change defaults
- Versal has IO mapped to the upper 64bit address space and needs full 64bit addresses. - Add xilinx_versal_aiedge for custom hardware - Make the hardware settings the defaults and qemu as variants Closes #4693
Diffstat (limited to '')
-rw-r--r--spec/build/bsps/aarch64/xilinx-versal/bspvck190.yml (renamed from spec/build/bsps/aarch64/xilinx-versal/bspvck190lp64.yml)2
1 files changed, 1 insertions, 1 deletions
diff --git a/spec/build/bsps/aarch64/xilinx-versal/bspvck190lp64.yml b/spec/build/bsps/aarch64/xilinx-versal/bspvck190.yml
index b33a10f8f0..bc2bbc1c5d 100644
--- a/spec/build/bsps/aarch64/xilinx-versal/bspvck190lp64.yml
+++ b/spec/build/bsps/aarch64/xilinx-versal/bspvck190.yml
@@ -1,6 +1,6 @@
SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
arch: aarch64
-bsp: xilinx_versal_lp64_vck190
+bsp: xilinx_versal_vck190
build-type: bsp
cflags: []
copyrights: