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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-07-01 15:21:47 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-07-12 08:26:46 +0200 |
| commit | 5cc075712e628191477d0c9d074e15b6a7c1e1e3 (patch) | |
| tree | 0c56dc58c1dc73e06dcec72f8e8933183e5fff5f /spec/build/bsps/aarch64/grp.yml | |
| parent | bsps/m68k/uC5282: Change license to BSD-2 (diff) | |
| download | rtems-5cc075712e628191477d0c9d074e15b6a7c1e1e3.tar.bz2 | |
irq/arm-gicv3.h: Customize CPU Interface init
Use the existing WRITE_SR() abstraction to access the interrupt group 0 and 1
enable registers. This fixes the build for the AArch32 target.
Add BSP options which define the initial values of CPU Interface registers.
Diffstat (limited to 'spec/build/bsps/aarch64/grp.yml')
| -rw-r--r-- | spec/build/bsps/aarch64/grp.yml | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/spec/build/bsps/aarch64/grp.yml b/spec/build/bsps/aarch64/grp.yml index ba4ec6c6cf..9428fb9435 100644 --- a/spec/build/bsps/aarch64/grp.yml +++ b/spec/build/bsps/aarch64/grp.yml @@ -22,7 +22,6 @@ install: - bsps/include/dev/irq/arm-gic-regs.h - bsps/include/dev/irq/arm-gic-tm27.h - bsps/include/dev/irq/arm-gic.h - - bsps/include/dev/irq/arm-gicv3.h - destination: ${BSP_LIBDIR} source: - bsps/aarch64/shared/start/linkcmds.base |