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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-07-01 15:21:47 +0200 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2022-07-12 08:26:46 +0200 |
| commit | 5cc075712e628191477d0c9d074e15b6a7c1e1e3 (patch) | |
| tree | 0c56dc58c1dc73e06dcec72f8e8933183e5fff5f /spec/build/bsps/aarch64/a53 | |
| parent | bsps/m68k/uC5282: Change license to BSD-2 (diff) | |
| download | rtems-5cc075712e628191477d0c9d074e15b6a7c1e1e3.tar.bz2 | |
irq/arm-gicv3.h: Customize CPU Interface init
Use the existing WRITE_SR() abstraction to access the interrupt group 0 and 1
enable registers. This fixes the build for the AArch32 target.
Add BSP options which define the initial values of CPU Interface registers.
Diffstat (limited to 'spec/build/bsps/aarch64/a53')
| -rw-r--r-- | spec/build/bsps/aarch64/a53/grp.yml | 2 | ||||
| -rw-r--r-- | spec/build/bsps/aarch64/a53/obj.yml | 1 |
2 files changed, 2 insertions, 1 deletions
diff --git a/spec/build/bsps/aarch64/a53/grp.yml b/spec/build/bsps/aarch64/a53/grp.yml index 091f18d6f5..9ab10d643d 100644 --- a/spec/build/bsps/aarch64/a53/grp.yml +++ b/spec/build/bsps/aarch64/a53/grp.yml @@ -33,6 +33,8 @@ links: - role: build-dependency uid: ../../objirq - role: build-dependency + uid: ../../dev/irq/objarmgicv3 +- role: build-dependency uid: ../../objmem - role: build-dependency uid: ../../optcachedata diff --git a/spec/build/bsps/aarch64/a53/obj.yml b/spec/build/bsps/aarch64/a53/obj.yml index 242631fba2..33c0884b85 100644 --- a/spec/build/bsps/aarch64/a53/obj.yml +++ b/spec/build/bsps/aarch64/a53/obj.yml @@ -26,7 +26,6 @@ source: - bsps/shared/dev/btimer/btimer-cpucounter.c - bsps/shared/dev/clock/arm-generic-timer.c - bsps/shared/dev/getentropy/getentropy-cpucounter.c -- bsps/shared/dev/irq/arm-gicv3.c - bsps/shared/dev/serial/console-termios-init.c - bsps/shared/dev/serial/console-termios.c - bsps/shared/irq/irq-default-handler.c |