summaryrefslogtreecommitdiffstats
path: root/spec/build/bsps/aarch64/a53/obj.yml
diff options
context:
space:
mode:
authorSebastian Huber <sebastian.huber@embedded-brains.de>2022-07-01 15:21:47 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2022-07-12 08:26:46 +0200
commit5cc075712e628191477d0c9d074e15b6a7c1e1e3 (patch)
tree0c56dc58c1dc73e06dcec72f8e8933183e5fff5f /spec/build/bsps/aarch64/a53/obj.yml
parentbsps/m68k/uC5282: Change license to BSD-2 (diff)
downloadrtems-5cc075712e628191477d0c9d074e15b6a7c1e1e3.tar.bz2
irq/arm-gicv3.h: Customize CPU Interface init
Use the existing WRITE_SR() abstraction to access the interrupt group 0 and 1 enable registers. This fixes the build for the AArch32 target. Add BSP options which define the initial values of CPU Interface registers.
Diffstat (limited to '')
-rw-r--r--spec/build/bsps/aarch64/a53/obj.yml1
1 files changed, 0 insertions, 1 deletions
diff --git a/spec/build/bsps/aarch64/a53/obj.yml b/spec/build/bsps/aarch64/a53/obj.yml
index 242631fba2..33c0884b85 100644
--- a/spec/build/bsps/aarch64/a53/obj.yml
+++ b/spec/build/bsps/aarch64/a53/obj.yml
@@ -26,7 +26,6 @@ source:
- bsps/shared/dev/btimer/btimer-cpucounter.c
- bsps/shared/dev/clock/arm-generic-timer.c
- bsps/shared/dev/getentropy/getentropy-cpucounter.c
-- bsps/shared/dev/irq/arm-gicv3.c
- bsps/shared/dev/serial/console-termios-init.c
- bsps/shared/dev/serial/console-termios.c
- bsps/shared/irq/irq-default-handler.c