diff options
author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-11-21 18:35:42 +0000 |
---|---|---|
committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2001-11-21 18:35:42 +0000 |
commit | bbb6af24fac118f633c0ffbe3213efa2cf9c177f (patch) | |
tree | a5fa8cacfbb59f17ff3c8bd510aab69bc947e104 /make | |
parent | 2001-11-21 Ralf Corsepius <corsepiu@faw.uni-ulm.de> (diff) | |
download | rtems-bbb6af24fac118f633c0ffbe3213efa2cf9c177f.tar.bz2 |
2001-11-21 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* custom/dmv177.cfg: Reflect changes to dmv177/configure.ac.
* custom/ppcn_60x.cfg: Refect changes to ppcn_60x/configure.ac.
* custom/psim.cfg: Refect changes to psim/configure.ac.
* custom/score603e.cfg: Reflect changes to score603e/configure.ac,
remove SCORE603E_GENERATION.
Diffstat (limited to 'make')
-rw-r--r-- | make/ChangeLog | 8 | ||||
-rw-r--r-- | make/custom/dmv177.cfg | 33 | ||||
-rw-r--r-- | make/custom/ppcn_60x.cfg | 33 | ||||
-rw-r--r-- | make/custom/psim.cfg | 17 | ||||
-rw-r--r-- | make/custom/score603e.cfg | 56 |
5 files changed, 10 insertions, 137 deletions
diff --git a/make/ChangeLog b/make/ChangeLog index 6717014d4e..c8c41cbc3f 100644 --- a/make/ChangeLog +++ b/make/ChangeLog @@ -1,4 +1,12 @@ +2001-11-21 Ralf Corsepius <corsepiu@faw.uni-ulm.de> + + * custom/dmv177.cfg: Reflect changes to dmv177/configure.ac. + * custom/ppcn_60x.cfg: Refect changes to ppcn_60x/configure.ac. + * custom/psim.cfg: Refect changes to psim/configure.ac. + * custom/score603e.cfg: Reflect changes to score603e/configure.ac, + remove SCORE603E_GENERATION. + 2001-11-16 Ralf Corsepius <corsepiu@faw.uni-ulm.de> * custom/eth_comm.cfg: Reflect changes to eth_comm/configure.ac. diff --git a/make/custom/dmv177.cfg b/make/custom/dmv177.cfg index 05fb516a58..595279a8a0 100644 --- a/make/custom/dmv177.cfg +++ b/make/custom/dmv177.cfg @@ -16,39 +16,6 @@ RTEMS_CPU_MODEL=ppc603e # This is the actual bsp directory used during the build process. RTEMS_BSP_FAMILY=dmv177 -# This section makes the target dependent options file. - -# PPC_VECTOR_FILE_BASE (ppc) -# This defines the base address of the exception table. -# NOTE: Vectors are actually at 0xFFF00000 but file starts at offset 0x0100 -# -# PPC_USE_SPRG (RTEMS PowerPC port) -# If defined, then the PowerPC specific code in RTEMS will use some -# of the special purpose registers to slightly optimize interrupt -# response time. The use of these registers can conflict with -# other tools like debuggers. -# -# PPC_USE_DATA_CACHE (RTEMS PowerPC port/BSP) -# If defined, then the PowerPC specific code in RTEMS will use -# data cache instructions to optimize the context switch code. -# This code can conflict with debuggers or emulators. It is known -# to break the Corelis PowerPC emulator with at least some combinations -# of PowerPC 603e revisions and emulator versions. -# The BSP actually contains the call that enables this. -# -# PPC_USE_INSTRUCTION_CACHE (RTEMS PowerPC port/BSP) -# If defined, then the PowerPC specific code in RTEMS will use -# data cache instructions to optimize the context switch code. -# This code can conflict with debuggers or emulators. -# The BSP actually contains the call that enables this. - -define make-target-options - @echo "#define PPC_VECTOR_FILE_BASE 0x0100" >>$@ - @echo "#define PPC_USE_SPRG 0" >>$@ - @echo "#define PPC_USE_DATA_CACHE 0" >>$@ - @echo "#define PPC_USE_INSTRUCTION_CACHE 1" >>$@ -endef - # This contains the compiler options necessary to select the CPU model # and (hopefully) optimize for it. # diff --git a/make/custom/ppcn_60x.cfg b/make/custom/ppcn_60x.cfg index 67f6ca037a..b6bca171d0 100644 --- a/make/custom/ppcn_60x.cfg +++ b/make/custom/ppcn_60x.cfg @@ -14,39 +14,6 @@ RTEMS_CPU_MODEL=ppc603e RTEMS_BSP_FAMILY=ppcn_60x # This contains the compiler options necessary to select the CPU model -# This section makes the target dependent options file. - -# PPCN_60X_USE_DINK (ppcn_60x_bsp) -# PPCN_60X_USE_NONE (ppcn_60x_bsp) -# The Score603e board can be configured with 3 ROM monitors. Only two -# are appropriate for use with RTEMS. Set exactly one of these to "1" -# to indicate which ROM monitor is on the board you are using. -# -# PPC_VECTOR_FILE_BASE (ppc) -# This defines the base address of the exception table. -# NOTE: Vectors are actually at 0xFFF00000 but file starts at offset 0x0100 -# -# PPC_USE_SPRG (RTEMS PowerPC port) -# If defined, then the PowerPC specific code in RTEMS will use some -# of the special purpose registers to slightly optimize interrupt -# response time. The use of these registers can conflict with -# other tools like debuggers. -# -# PPC_USE_DATA_CACHE (RTEMS PowerPC port) -# If defined, then the PowerPC specific code in RTEMS will use -# data cache instructions to optimize the context switch code. -# This code can conflict with debuggers or emulators. -# - -define make-target-options - @echo "#define PPCN_60X_USE_DINK 1" >>$@ - @echo "#define PPCN_60X_USE_NONE 0" >>$@ - @echo "#define PPC_USE_DATA_CACHE 1" >>$@ - @echo "#define PPC_VECTOR_FILE_BASE 0x0100" >>$@ - @echo "#define PPC_USE_SPRG 0" >>$@ -endef - -# This contains the compiler options necessary to select the CPU model # and (hopefully) optimize for it. # CPU_CFLAGS = -mcpu=603 diff --git a/make/custom/psim.cfg b/make/custom/psim.cfg index aa01beb8b3..6cc3c01153 100644 --- a/make/custom/psim.cfg +++ b/make/custom/psim.cfg @@ -12,23 +12,6 @@ RTEMS_CPU_MODEL=ppc603e # This is the actual bsp directory used during the build process. RTEMS_BSP_FAMILY=psim -# This section makes the target dependent options file. - -# PPC_VECTOR_FILE_BASE (PowerPC) -# This defines the base address of the exception table. -# NOTE: Vectors are actually at 0xFFF00000 but file starts at offset 0x0100 -# -# PPC_USE_SPRG (RTEMS PowerPC port) -# If defined, then the PowerPC specific code in RTEMS will use some -# of the special purpose registers to slightly optimize interrupt -# response time. The use of these registers can conflict with -# other tools like debuggers. - -define make-target-options - @echo "#define PPC_VECTOR_FILE_BASE 0xFFF00100" >>$@ - @echo "#define PPC_USE_SPRG 1" >>$@ -endef - # This contains the compiler options necessary to select the CPU model # and (hopefully) optimize for it. # diff --git a/make/custom/score603e.cfg b/make/custom/score603e.cfg index 6f201ea304..0dcc166fe9 100644 --- a/make/custom/score603e.cfg +++ b/make/custom/score603e.cfg @@ -7,67 +7,15 @@ # $Id$ # +include $(RTEMS_ROOT)/make/custom/default.cfg + RTEMS_CPU=powerpc RTEMS_CPU_MODEL=ppc603e -# Set the default generation if it has not been overridden -ifeq ($(SCORE603E_GENERATION),) -SCORE603E_GENERATION=2 -endif - # This is the actual bsp directory used during the build process. RTEMS_BSP_FAMILY=score603e -ifeq ($(SCORE603E_GENERATION),1) -RTEMS_BSP=score603e_g1 - -else -ifeq ($(SCORE603E_GENERATION),2) -RTEMS_BSP=score603e - -endif # generation 2 -endif # generation 1 - -include $(RTEMS_ROOT)/make/custom/default.cfg - -# This section makes the target dependent options file. - -# SCORE603E_USE_SDS (score603e_bsp) -# SCORE603E_USE_OPEN_FIRMWARE (score603e_bsp) -# SCORE603E_USE_NONE (score603e_bsp) -# The Score603e board can be configured with 3 ROM monitors. Only two -# are appropriate for use with RTEMS. Set exactly one of these to "1" -# to indicate which ROM monitor is on the board you are using. -# -# PPC_VECTOR_FILE_BASE (ppc) -# This defines the base address of the exception table. -# NOTE: Vectors are actually at 0xFFF00000 but file starts at offset 0x0100 -# -# PPC_USE_SPRG (RTEMS PowerPC port) -# If defined, then the PowerPC specific code in RTEMS will use some -# of the special purpose registers to slightly optimize interrupt -# response time. The use of these registers can conflict with -# other tools like debuggers. -# -# PPC_USE_DATA_CACHE (RTEMS PowerPC port) -# If defined, then the PowerPC specific code in RTEMS will use -# data cache instructions to optimize the context switch code. -# This code can conflict with debuggers or emulators. -# - -define make-target-options - @echo "#define INITIALIZE_COM_PORTS 1" >>$@ - @echo "#define SCORE603E_GENERATION $(SCORE603E_GENERATION)" >>$@ - @echo "#define SCORE603E_USE_SDS 0" >>$@ - @echo "#define SCORE603E_USE_NONE 0" >>$@ - @echo "#define SCORE603E_USE_DINK 1" >>$@ - @echo "#define SCORE603E_USE_OPEN_FIRMWARE 0" >>$@ - @echo "#define PPC_USE_DATA_CACHE 0" >>$@ - @echo "#define PPC_VECTOR_FILE_BASE 0x0100" >>$@ - @echo "#define PPC_USE_SPRG 0" >>$@ - @echo "#define HAS_PMC_PSC8 0" >>$@ -endef # This contains the compiler options necessary to select the CPU model # and (hopefully) optimize for it. |