summaryrefslogtreecommitdiffstats
path: root/doc
diff options
context:
space:
mode:
authorSebastian Huber <sebastian.huber@embedded-brains.de>2015-06-26 21:39:16 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2015-06-26 21:39:16 +0200
commitcb2b8f02dd701389084a23188705ef393ef609db (patch)
treefc1b7bbafdcb405794f7165519e1c8612fd787cc /doc
parentdoc: Update ARM documentation (diff)
downloadrtems-cb2b8f02dd701389084a23188705ef393ef609db.tar.bz2
doc: Fix interrupt level ARM documentation
Diffstat (limited to 'doc')
-rw-r--r--doc/cpu_supplement/arm.t7
1 files changed, 3 insertions, 4 deletions
diff --git a/doc/cpu_supplement/arm.t b/doc/cpu_supplement/arm.t
index 88693aa213..304e1e1f0a 100644
--- a/doc/cpu_supplement/arm.t
+++ b/doc/cpu_supplement/arm.t
@@ -152,10 +152,9 @@ confusion.
@subsection Interrupt Levels
-The RTEMS interrupt level mapping scheme for the ARM is not a numeric level as
-on most RTEMS ports. It is a bit mapping that corresponds the enable bit
-postions in the Current Program Status Register (CPSR). There are only two
-levels: IRQ enabled and IRQ disabled.
+There are exactly two interrupt levels on ARM with respect to RTEMS. Level
+zero corresponds to interrupts enabled. Level one corresponds to interrupts
+disabled.
@subsection Interrupt Stack