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authorJoel Sherrill <joel.sherrill@OARcorp.com>1998-08-13 22:22:12 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>1998-08-13 22:22:12 +0000
commit83c1360255c31302857d0a068a8f4127e8cb3992 (patch)
treec35d1422f7e1f55effed4f8752195111d9c9c390 /doc
parentFixed preinstall stanza so the prebuild works. (diff)
downloadrtems-83c1360255c31302857d0a068a8f4127e8cb3992.tar.bz2
New times for 4.0.0-lmco
Diffstat (limited to 'doc')
-rw-r--r--doc/supplements/powerpc/DMV177_TIMES335
-rw-r--r--doc/supplements/powerpc/timeDMV177.t85
-rw-r--r--doc/supplements/powerpc/timePSIM.t21
-rw-r--r--doc/supplements/powerpc/timedata.t21
-rw-r--r--doc/supplements/powerpc/timedatadmv177.t85
5 files changed, 278 insertions, 269 deletions
diff --git a/doc/supplements/powerpc/DMV177_TIMES b/doc/supplements/powerpc/DMV177_TIMES
index f4a8bf6896..7cb7c06f76 100644
--- a/doc/supplements/powerpc/DMV177_TIMES
+++ b/doc/supplements/powerpc/DMV177_TIMES
@@ -18,230 +18,231 @@ RTEMS_CPU_MODEL PPC603e
# RTEMS_VERSION_FOR_MAXIMUM_DISABLE_PERIOD.
#
RTEMS_MAXIMUM_DISABLE_PERIOD TBD
-RTEMS_MAXIMUM_DISABLE_PERIOD_MHZ 15.0
-RTEMS_RELEASE_FOR_MAXIMUM_DISABLE_PERIOD 4.2.0-prerelease
+RTEMS_MAXIMUM_DISABLE_PERIOD_MHZ 100.0
+RTEMS_RELEASE_FOR_MAXIMUM_DISABLE_PERIOD 4.0.0-lmco
#
# Context Switch Times
#
-RTEMS_NO_FP_CONTEXTS 21
-RTEMS_RESTORE_1ST_FP_TASK 26
-RTEMS_SAVE_INIT_RESTORE_INIT 24
-RTEMS_SAVE_IDLE_RESTORE_INIT 23
-RTEMS_SAVE_IDLE_RESTORE_IDLE 33
+RTEMS_NO_FP_CONTEXTS 585
+RTEMS_RESTORE_1ST_FP_TASK 730
+RTEMS_SAVE_INIT_RESTORE_INIT 478
+RTEMS_SAVE_IDLE_RESTORE_INIT 825
+RTEMS_SAVE_IDLE_RESTORE_IDLE 478
#
# Task Manager Times
#
-RTEMS_TASK_CREATE_ONLY 59
-RTEMS_TASK_IDENT_ONLY 163
-RTEMS_TASK_START_ONLY 30
-RTEMS_TASK_RESTART_CALLING_TASK 64
-RTEMS_TASK_RESTART_SUSPENDED_RETURNS_TO_CALLER 36
-RTEMS_TASK_RESTART_BLOCKED_RETURNS_TO_CALLER 47
-RTEMS_TASK_RESTART_READY_RETURNS_TO_CALLER 37
-RTEMS_TASK_RESTART_SUSPENDED_PREEMPTS_CALLER 77
-RTEMS_TASK_RESTART_BLOCKED_PREEMPTS_CALLER 84
-RTEMS_TASK_RESTART_READY_PREEMPTS_CALLER 75
-RTEMS_TASK_DELETE_CALLING_TASK 91
-RTEMS_TASK_DELETE_SUSPENDED_TASK 47
-RTEMS_TASK_DELETE_BLOCKED_TASK 50
-RTEMS_TASK_DELETE_READY_TASK 51
-RTEMS_TASK_SUSPEND_CALLING_TASK 56
-RTEMS_TASK_SUSPEND_RETURNS_TO_CALLER 16
-RTEMS_TASK_RESUME_TASK_READIED_RETURNS_TO_CALLER 17
-RTEMS_TASK_RESUME_TASK_READIED_PREEMPTS_CALLER 52
-RTEMS_TASK_SET_PRIORITY_OBTAIN_CURRENT_PRIORITY 10
-RTEMS_TASK_SET_PRIORITY_RETURNS_TO_CALLER 25
-RTEMS_TASK_SET_PRIORITY_PREEMPTS_CALLER 67
-RTEMS_TASK_MODE_OBTAIN_CURRENT_MODE 5
-RTEMS_TASK_MODE_NO_RESCHEDULE 6
-RTEMS_TASK_MODE_RESCHEDULE_RETURNS_TO_CALLER 9
-RTEMS_TASK_MODE_RESCHEDULE_PREEMPTS_CALLER 42
-RTEMS_TASK_GET_NOTE_ONLY 10
-RTEMS_TASK_SET_NOTE_ONLY 10
-RTEMS_TASK_WAKE_AFTER_YIELD_RETURNS_TO_CALLER 6
-RTEMS_TASK_WAKE_AFTER_YIELD_PREEMPTS_CALLER 49
-RTEMS_TASK_WAKE_WHEN_ONLY 75
+RTEMS_TASK_CREATE_ONLY 2301
+RTEMS_TASK_IDENT_ONLY 2900
+RTEMS_TASK_START_ONLY 794
+RTEMS_TASK_RESTART_CALLING_TASK 1137
+RTEMS_TASK_RESTART_SUSPENDED_RETURNS_TO_CALLER 906
+RTEMS_TASK_RESTART_BLOCKED_RETURNS_TO_CALLER 1102
+RTEMS_TASK_RESTART_READY_RETURNS_TO_CALLER 928
+RTEMS_TASK_RESTART_SUSPENDED_PREEMPTS_CALLER 14823
+RTEMS_TASK_RESTART_BLOCKED_PREEMPTS_CALLER 1640
+RTEMS_TASK_RESTART_READY_PREEMPTS_CALLER 1601
+RTEMS_TASK_DELETE_CALLING_TASK 2117
+RTEMS_TASK_DELETE_SUSPENDED_TASK 1555
+RTEMS_TASK_DELETE_BLOCKED_TASK 1609
+RTEMS_TASK_DELETE_READY_TASK 1620
+RTEMS_TASK_SUSPEND_CALLING_TASK 960
+RTEMS_TASK_SUSPEND_RETURNS_TO_CALLER 433
+RTEMS_TASK_RESUME_TASK_READIED_RETURNS_TO_CALLER 960
+RTEMS_TASK_RESUME_TASK_READIED_PREEMPTS_CALLER 803
+RTEMS_TASK_SET_PRIORITY_OBTAIN_CURRENT_PRIORITY 368
+RTEMS_TASK_SET_PRIORITY_RETURNS_TO_CALLER 633
+RTEMS_TASK_SET_PRIORITY_PREEMPTS_CALLER 1211
+RTEMS_TASK_MODE_OBTAIN_CURRENT_MODE 184
+RTEMS_TASK_MODE_NO_RESCHEDULE 213
+RTEMS_TASK_MODE_RESCHEDULE_RETURNS_TO_CALLER 247
+RTEMS_TASK_MODE_RESCHEDULE_PREEMPTS_CALLER 919
+RTEMS_TASK_GET_NOTE_ONLY 382
+RTEMS_TASK_SET_NOTE_ONLY 383
+RTEMS_TASK_WAKE_AFTER_YIELD_RETURNS_TO_CALLER 245
+RTEMS_TASK_WAKE_AFTER_YIELD_PREEMPTS_CALLER 851
+RTEMS_TASK_WAKE_WHEN_ONLY 1275
#
# Interrupt Manager
#
-RTEMS_INTR_ENTRY_RETURNS_TO_NESTED 7
-RTEMS_INTR_ENTRY_RETURNS_TO_INTERRUPTED_TASK 8
-RTEMS_INTR_ENTRY_RETURNS_TO_PREEMPTING_TASK 8
-RTEMS_INTR_EXIT_RETURNS_TO_NESTED 5
-RTEMS_INTR_EXIT_RETURNS_TO_INTERRUPTED_TASK 7
-RTEMS_INTR_EXIT_RETURNS_TO_PREEMPTING_TASK 14
+RTEMS_INTR_ENTRY_RETURNS_TO_NESTED 201
+RTEMS_INTR_ENTRY_RETURNS_TO_INTERRUPTED_TASK 206
+RTEMS_INTR_ENTRY_RETURNS_TO_PREEMPTING_TASK 202
+RTEMS_INTR_EXIT_RETURNS_TO_NESTED 201
+RTEMS_INTR_EXIT_RETURNS_TO_INTERRUPTED_TASK 213
+RTEMS_INTR_EXIT_RETURNS_TO_PREEMPTING_TASK 267875
#
# Clock Manager
#
-RTEMS_CLOCK_SET_ONLY 33
-RTEMS_CLOCK_GET_ONLY 4
-RTEMS_CLOCK_TICK_ONLY 6
+RTEMS_CLOCK_SET_ONLY 792
+RTEMS_CLOCK_GET_ONLY 78
+RTEMS_CLOCK_TICK_ONLY 214
#
# Timer Manager
#
-RTEMS_TIMER_CREATE_ONLY 11
-RTEMS_TIMER_IDENT_ONLY 159
-RTEMS_TIMER_DELETE_INACTIVE 15
-RTEMS_TIMER_DELETE_ACTIVE 17
-RTEMS_TIMER_FIRE_AFTER_INACTIVE 21
-RTEMS_TIMER_FIRE_AFTER_ACTIVE 23
-RTEMS_TIMER_FIRE_WHEN_INACTIVE 34
-RTEMS_TIMER_FIRE_WHEN_ACTIVE 34
-RTEMS_TIMER_RESET_INACTIVE 20
-RTEMS_TIMER_RESET_ACTIVE 22
-RTEMS_TIMER_CANCEL_INACTIVE 10
-RTEMS_TIMER_CANCEL_ACTIVE 13
+RTEMS_TIMER_CREATE_ONLY 357
+RTEMS_TIMER_IDENT_ONLY 2828
+RTEMS_TIMER_DELETE_INACTIVE 432
+RTEMS_TIMER_DELETE_ACTIVE 471
+RTEMS_TIMER_FIRE_AFTER_INACTIVE 607
+RTEMS_TIMER_FIRE_AFTER_ACTIVE 646
+RTEMS_TIMER_FIRE_WHEN_INACTIVE 766
+RTEMS_TIMER_FIRE_WHEN_ACTIVE 764
+RTEMS_TIMER_RESET_INACTIVE 552
+RTEMS_TIMER_RESET_ACTIVE 766
+RTEMS_TIMER_CANCEL_INACTIVE 339
+RTEMS_TIMER_CANCEL_ACTIVE 378
#
# Semaphore Manager
#
-RTEMS_SEMAPHORE_CREATE_ONLY 19
-RTEMS_SEMAPHORE_IDENT_ONLY 171
-RTEMS_SEMAPHORE_DELETE_ONLY 19
-RTEMS_SEMAPHORE_OBTAIN_AVAILABLE 12
-RTEMS_SEMAPHORE_OBTAIN_NOT_AVAILABLE_NO_WAIT 12
-RTEMS_SEMAPHORE_OBTAIN_NOT_AVAILABLE_CALLER_BLOCKS 67
-RTEMS_SEMAPHORE_RELEASE_NO_WAITING_TASKS 14
-RTEMS_SEMAPHORE_RELEASE_TASK_READIED_RETURNS_TO_CALLER 23
-RTEMS_SEMAPHORE_RELEASE_TASK_READIED_PREEMPTS_CALLER 57
+RTEMS_SEMAPHORE_CREATE_ONLY 571
+RTEMS_SEMAPHORE_IDENT_ONLY 3243
+RTEMS_SEMAPHORE_DELETE_ONLY 575
+RTEMS_SEMAPHORE_OBTAIN_AVAILABLE 414
+RTEMS_SEMAPHORE_OBTAIN_NOT_AVAILABLE_NO_WAIT 414
+RTEMS_SEMAPHORE_OBTAIN_NOT_AVAILABLE_CALLER_BLOCKS 1254
+RTEMS_SEMAPHORE_RELEASE_NO_WAITING_TASKS 501
+RTEMS_SEMAPHORE_RELEASE_TASK_READIED_RETURNS_TO_CALLER 636
+RTEMS_SEMAPHORE_RELEASE_TASK_READIED_PREEMPTS_CALLER 982
#
# Message Manager
#
-RTEMS_MESSAGE_QUEUE_CREATE_ONLY 114
-RTEMS_MESSAGE_QUEUE_IDENT_ONLY 159
-RTEMS_MESSAGE_QUEUE_DELETE_ONLY 25
-RTEMS_MESSAGE_QUEUE_SEND_NO_WAITING_TASKS 36
-RTEMS_MESSAGE_QUEUE_SEND_TASK_READIED_RETURNS_TO_CALLER 38
-RTEMS_MESSAGE_QUEUE_SEND_TASK_READIED_PREEMPTS_CALLER 76
-RTEMS_MESSAGE_QUEUE_URGENT_NO_WAITING_TASKS 36
-RTEMS_MESSAGE_QUEUE_URGENT_TASK_READIED_RETURNS_TO_CALLER 38
-RTEMS_MESSAGE_QUEUE_URGENT_TASK_READIED_PREEMPTS_CALLER 76
-RTEMS_MESSAGE_QUEUE_BROADCAST_NO_WAITING_TASKS 15
-RTEMS_MESSAGE_QUEUE_BROADCAST_TASK_READIED_RETURNS_TO_CALLER 42
-RTEMS_MESSAGE_QUEUE_BROADCAST_TASK_READIED_PREEMPTS_CALLER 83
-RTEMS_MESSAGE_QUEUE_RECEIVE_AVAILABLE 30
-RTEMS_MESSAGE_QUEUE_RECEIVE_NOT_AVAILABLE_NO_WAIT 13
-RTEMS_MESSAGE_QUEUE_RECEIVE_NOT_AVAILABLE_CALLER_BLOCKS 67
-RTEMS_MESSAGE_QUEUE_FLUSH_NO_MESSAGES_FLUSHED 9
-RTEMS_MESSAGE_QUEUE_FLUSH_MESSAGES_FLUSHED 13
+RTEMS_MESSAGE_QUEUE_CREATE_ONLY 2270
+RTEMS_MESSAGE_QUEUE_IDENT_ONLY 2828
+RTEMS_MESSAGE_QUEUE_DELETE_ONLY 708
+RTEMS_MESSAGE_QUEUE_SEND_NO_WAITING_TASKS 923
+RTEMS_MESSAGE_QUEUE_SEND_TASK_READIED_RETURNS_TO_CALLER 955
+RTEMS_MESSAGE_QUEUE_SEND_TASK_READIED_PREEMPTS_CALLER 1322
+RTEMS_MESSAGE_QUEUE_URGENT_NO_WAITING_TASKS 919
+RTEMS_MESSAGE_QUEUE_URGENT_TASK_READIED_RETURNS_TO_CALLER 955
+RTEMS_MESSAGE_QUEUE_URGENT_TASK_READIED_PREEMPTS_CALLER 1322
+RTEMS_MESSAGE_QUEUE_BROADCAST_NO_WAITING_TASKS 589
+RTEMS_MESSAGE_QUEUE_BROADCAST_TASK_READIED_RETURNS_TO_CALLER 1079
+RTEMS_MESSAGE_QUEUE_BROADCAST_TASK_READIED_PREEMPTS_CALLER 1435
+RTEMS_MESSAGE_QUEUE_RECEIVE_AVAILABLE 755
+RTEMS_MESSAGE_QUEUE_RECEIVE_NOT_AVAILABLE_NO_WAIT 467
+RTEMS_MESSAGE_QUEUE_RECEIVE_NOT_AVAILABLE_CALLER_BLOCKS 1283
+RTEMS_MESSAGE_QUEUE_FLUSH_NO_MESSAGES_FLUSHED 369
+RTEMS_MESSAGE_QUEUE_FLUSH_MESSAGES_FLUSHED 431
#
# Event Manager
#
-RTEMS_EVENT_SEND_NO_TASK_READIED 9
-RTEMS_EVENT_SEND_TASK_READIED_RETURNS_TO_CALLER 22
-RTEMS_EVENT_SEND_TASK_READIED_PREEMPTS_CALLER 58
-RTEMS_EVENT_RECEIVE_OBTAIN_CURRENT_EVENTS 1
-RTEMS_EVENT_RECEIVE_AVAILABLE 10
-RTEMS_EVENT_RECEIVE_NOT_AVAILABLE_NO_WAIT 9
-RTEMS_EVENT_RECEIVE_NOT_AVAILABLE_CALLER_BLOCKS 60
+RTEMS_EVENT_SEND_NO_TASK_READIED 354
+RTEMS_EVENT_SEND_TASK_READIED_RETURNS_TO_CALLER 571
+RTEMS_EVENT_SEND_TASK_READIED_PREEMPTS_CALLER 946
+RTEMS_EVENT_RECEIVE_OBTAIN_CURRENT_EVENTS 43
+RTEMS_EVENT_RECEIVE_AVAILABLE 357
+RTEMS_EVENT_RECEIVE_NOT_AVAILABLE_NO_WAIT 331
+RTEMS_EVENT_RECEIVE_NOT_AVAILABLE_CALLER_BLOCKS 1043
#
# Signal Manager
#
-RTEMS_SIGNAL_CATCH_ONLY 6
-RTEMS_SIGNAL_SEND_RETURNS_TO_CALLER 14
-RTEMS_SIGNAL_SEND_SIGNAL_TO_SELF 22
-RTEMS_SIGNAL_EXIT_ASR_OVERHEAD_RETURNS_TO_CALLING_TASK 27
-RTEMS_SIGNAL_EXIT_ASR_OVERHEAD_RETURNS_TO_PREEMPTING_TASK 56
+RTEMS_SIGNAL_CATCH_ONLY 267
+RTEMS_SIGNAL_SEND_RETURNS_TO_CALLER 408
+RTEMS_SIGNAL_SEND_SIGNAL_TO_SELF 607
+RTEMS_SIGNAL_EXIT_ASR_OVERHEAD_RETURNS_TO_CALLING_TASK 464
+RTEMS_SIGNAL_EXIT_ASR_OVERHEAD_RETURNS_TO_PREEMPTING_TASK 752
#
# Partition Manager
#
-RTEMS_PARTITION_CREATE_ONLY 34
-RTEMS_PARTITION_IDENT_ONLY 159
-RTEMS_PARTITION_DELETE_ONLY 14
-RTEMS_PARTITION_GET_BUFFER_AVAILABLE 12
-RTEMS_PARTITION_GET_BUFFER_NOT_AVAILABLE 10
-RTEMS_PARTITION_RETURN_BUFFER_ONLY 16
+RTEMS_PARTITION_CREATE_ONLY 762
+RTEMS_PARTITION_IDENT_ONLY 2828
+RTEMS_PARTITION_DELETE_ONLY 426
+RTEMS_PARTITION_GET_BUFFER_AVAILABLE 394
+RTEMS_PARTITION_GET_BUFFER_NOT_AVAILABLE 376
+RTEMS_PARTITION_RETURN_BUFFER_ONLY 420
#
# Region Manager
#
-RTEMS_REGION_CREATE_ONLY 22
-RTEMS_REGION_IDENT_ONLY 162
-RTEMS_REGION_DELETE_ONLY 14
-RTEMS_REGION_GET_SEGMENT_AVAILABLE 19
-RTEMS_REGION_GET_SEGMENT_NOT_AVAILABLE_NO_WAIT 19
-RTEMS_REGION_GET_SEGMENT_NOT_AVAILABLE_CALLER_BLOCKS 67
-RTEMS_REGION_RETURN_SEGMENT_NO_WAITING_TASKS 17
-RTEMS_REGION_RETURN_SEGMENT_TASK_READIED_RETURNS_TO_CALLER 44
-RTEMS_REGION_RETURN_SEGMENT_TASK_READIED_PREEMPTS_CALLER 77
+RTEMS_REGION_CREATE_ONLY 614
+RTEMS_REGION_IDENT_ONLY 2878
+RTEMS_REGION_DELETE_ONLY 425
+RTEMS_REGION_GET_SEGMENT_AVAILABLE 515
+RTEMS_REGION_GET_SEGMENT_NOT_AVAILABLE_NO_WAIT 472
+RTEMS_REGION_GET_SEGMENT_NOT_AVAILABLE_CALLER_BLOCKS 1345
+RTEMS_REGION_RETURN_SEGMENT_NO_WAITING_TASKS 544
+RTEMS_REGION_RETURN_SEGMENT_TASK_READIED_RETURNS_TO_CALLER 935
+RTEMS_REGION_RETURN_SEGMENT_TASK_READIED_PREEMPTS_CALLER 1296
#
# Dual-Ported Memory Manager
#
-RTEMS_PORT_CREATE_ONLY 14
-RTEMS_PORT_IDENT_ONLY 159
-RTEMS_PORT_DELETE_ONLY 13
-RTEMS_PORT_INTERNAL_TO_EXTERNAL_ONLY 9
-RTEMS_PORT_EXTERNAL_TO_INTERNAL_ONLY 9
+RTEMS_PORT_CREATE_ONLY 428
+RTEMS_PORT_IDENT_ONLY 2828
+RTEMS_PORT_DELETE_ONLY 421
+RTEMS_PORT_INTERNAL_TO_EXTERNAL_ONLY 339
+RTEMS_PORT_EXTERNAL_TO_INTERNAL_ONLY 339
#
# IO Manager
#
-RTEMS_IO_INITIALIZE_ONLY 2
-RTEMS_IO_OPEN_ONLY 1
-RTEMS_IO_CLOSE_ONLY 1
-RTEMS_IO_READ_ONLY 1
-RTEMS_IO_WRITE_ONLY 1
-RTEMS_IO_CONTROL_ONLY 1
+RTEMS_IO_INITIALIZE_ONLY 52
+RTEMS_IO_OPEN_ONLY 42
+RTEMS_IO_CLOSE_ONLY 44
+RTEMS_IO_READ_ONLY 42
+RTEMS_IO_WRITE_ONLY 44
+RTEMS_IO_CONTROL_ONLY 42
#
# Rate Monotonic Manager
#
-RTEMS_RATE_MONOTONIC_CREATE_ONLY 12
-RTEMS_RATE_MONOTONIC_IDENT_ONLY 159
-RTEMS_RATE_MONOTONIC_CANCEL_ONLY 14
-RTEMS_RATE_MONOTONIC_DELETE_ACTIVE 19
-RTEMS_RATE_MONOTONIC_DELETE_INACTIVE 16
-RTEMS_RATE_MONOTONIC_PERIOD_INITIATE_PERIOD_RETURNS_TO_CALLER 20
-RTEMS_RATE_MONOTONIC_PERIOD_CONCLUDE_PERIOD_CALLER_BLOCKS 55
-RTEMS_RATE_MONOTONIC_PERIOD_OBTAIN_STATUS 9
+RTEMS_RATE_MONOTONIC_CREATE_ONLY 388
+RTEMS_RATE_MONOTONIC_IDENT_ONLY 2826
+RTEMS_RATE_MONOTONIC_CANCEL_ONLY 427
+RTEMS_RATE_MONOTONIC_DELETE_ACTIVE 519
+RTEMS_RATE_MONOTONIC_DELETE_INACTIVE 465
+RTEMS_RATE_MONOTONIC_PERIOD_INITIATE_PERIOD_RETURNS_TO_CALLER 556
+RTEMS_RATE_MONOTONIC_PERIOD_CONCLUDE_PERIOD_CALLER_BLOCKS 842
+RTEMS_RATE_MONOTONIC_PERIOD_OBTAIN_STATUS 377
#
# Size Information
#
#
# xxx alloted for numbers
#
-RTEMS_DATA_SPACE 9059
-RTEMS_MINIMUM_CONFIGURATION 28,288
-RTEMS_MAXIMUM_CONFIGURATION 50,432
+RTEMS_DATA_SPACE 428
+RTEMS_MINIMUM_CONFIGURATION 30,980
+RTEMS_MAXIMUM_CONFIGURATION 55540
# x,xxx alloted for numbers
-RTEMS_CORE_CODE_SIZE 20,336
-RTEMS_INITIALIZATION_CODE_SIZE 1,408
-RTEMS_TASK_CODE_SIZE 4,496
-RTEMS_INTERRUPT_CODE_SIZE 72
-RTEMS_CLOCK_CODE_SIZE 576
-RTEMS_TIMER_CODE_SIZE 1,336
-RTEMS_SEMAPHORE_CODE_SIZE 1,888
-RTEMS_MESSAGE_CODE_SIZE 2,032
-RTEMS_EVENT_CODE_SIZE 1,696
-RTEMS_SIGNAL_CODE_SIZE 664
-RTEMS_PARTITION_CODE_SIZE 1,368
-RTEMS_REGION_CODE_SIZE 1,736
-RTEMS_DPMEM_CODE_SIZE 872
-RTEMS_IO_CODE_SIZE 1,144
-RTEMS_FATAL_ERROR_CODE_SIZE 32
-RTEMS_RATE_MONOTONIC_CODE_SIZE 1,656
-RTEMS_MULTIPROCESSING_CODE_SIZE 8,328
+RTEMS_CORE_CODE_SIZE 21,516
+RTEMS_INITIALIZATION_CODE_SIZE 1,412
+RTEMS_TASK_CODE_SIZE 4,804
+RTEMS_INTERRUPT_CODE_SIZE 96
+RTEMS_CLOCK_CODE_SIZE 536
+RTEMS_TIMER_CODE_SIZE 1,380
+RTEMS_SEMAPHORE_CODE_SIZE 1,928
+RTEMS_MESSAGE_CODE_SIZE 532
+RTEMS_EVENT_CODE_SIZE 100
+RTEMS_SIGNAL_CODE_SIZE 100
+RTEMS_PARTITION_CODE_SIZE 1,384
+RTEMS_REGION_CODE_SIZE 1,780
+RTEMS_DPMEM_CODE_SIZE 928
+RTEMS_IO_CODE_SIZE 1,244
+RTEMS_FATAL_ERROR_CODE_SIZE 44
+RTEMS_RATE_MONOTONIC_CODE_SIZE 1,756
+RTEMS_MULTIPROCESSING_CODE_SIZE 11,448
# xxx alloted for numbers
-RTEMS_TIMER_CODE_OPTSIZE 208
-RTEMS_SEMAPHORE_CODE_OPTSIZE 192
-RTEMS_MESSAGE_CODE_OPTSIZE 320
-RTEMS_EVENT_CODE_OPTSIZE 64
-RTEMS_SIGNAL_CODE_OPTSIZE 64
-RTEMS_PARTITION_CODE_OPTSIZE 152
-RTEMS_REGION_CODE_OPTSIZE 176
-RTEMS_DPMEM_CODE_OPTSIZE 152
-RTEMS_IO_CODE_OPTSIZE 00
-RTEMS_RATE_MONOTONIC_CODE_OPTSIZE 208
-RTEMS_MULTIPROCESSING_CODE_OPTSIZE 408
+RTEMS_TIMER_CODE_OPTSIZE 340
+RTEMS_SEMAPHORE_CODE_OPTSIZE 308
+RTEMS_MESSAGE_CODE_OPTSIZE 532
+RTEMS_EVENT_CODE_OPTSIZE 100
+RTEMS_SIGNAL_CODE_OPTSIZE 100
+RTEMS_PARTITION_CODE_OPTSIZE 244
+RTEMS_REGION_CODE_OPTSIZE 292
+RTEMS_DPMEM_CODE_OPTSIZE 244
+RTEMS_IO_CODE_OPTSIZE NA
+RTEMS_RATE_MONOTONIC_CODE_OPTSIZE 336
+RTEMS_MULTIPROCESSING_CODE_OPTSIZE 612
# xxx alloted for numbers
-RTEMS_BYTES_PER_TASK 488
+RTEMS_BYTES_PER_TASK 456
RTEMS_BYTES_PER_TIMER 68
-RTEMS_BYTES_PER_SEMAPHORE 124
-RTEMS_BYTES_PER_MESSAGE_QUEUE 148
-RTEMS_BYTES_PER_REGION 144
+RTEMS_BYTES_PER_SEMAPHORE 120
+RTEMS_BYTES_PER_MESSAGE_QUEUE 144
+RTEMS_BYTES_PER_REGION 140
RTEMS_BYTES_PER_PARTITION 56
RTEMS_BYTES_PER_PORT 36
RTEMS_BYTES_PER_PERIOD 36
RTEMS_BYTES_PER_EXTENSION 64
-RTEMS_BYTES_PER_FP_TASK 136
+RTEMS_BYTES_PER_FP_TASK 264
RTEMS_BYTES_PER_NODE 48
RTEMS_BYTES_PER_GLOBAL_OBJECT 20
RTEMS_BYTES_PER_PROXY 124
# x,xxx alloted for numbers
-RTEMS_BYTES_OF_FIXED_SYSTEM_REQUIREMENTS 10,072
+RTEMS_BYTES_OF_FIXED_SYSTEM_REQUIREMENTS 10008
+
diff --git a/doc/supplements/powerpc/timeDMV177.t b/doc/supplements/powerpc/timeDMV177.t
index c96a1f86e1..fdf471bf51 100644
--- a/doc/supplements/powerpc/timeDMV177.t
+++ b/doc/supplements/powerpc/timeDMV177.t
@@ -1,4 +1,6 @@
@c
+@c Timing information for the DMV177
+@c
@c COPYRIGHT (c) 1988-1998.
@c On-Line Applications Research Corporation (OAR).
@c All rights reserved.
@@ -12,39 +14,39 @@
@end tex
@ifinfo
-@node DMV177 Timing Data, DMV177 Timing Data Introduction, PSIM Timing Data Rate Monotonic Manager, Top
+@node RTEMS_BSP Timing Data, RTEMS_BSP Timing Data Introduction, PSIM Timing Data Rate Monotonic Manager, Top
@end ifinfo
-@chapter DMV177 Timing Data
+@chapter RTEMS_BSP Timing Data
@ifinfo
@menu
-* DMV177 Timing Data Introduction::
-* DMV177 Timing Data Hardware Platform::
-* DMV177 Timing Data Interrupt Latency::
-* DMV177 Timing Data Context Switch::
-* DMV177 Timing Data Directive Times::
-* DMV177 Timing Data Task Manager::
-* DMV177 Timing Data Interrupt Manager::
-* DMV177 Timing Data Clock Manager::
-* DMV177 Timing Data Timer Manager::
-* DMV177 Timing Data Semaphore Manager::
-* DMV177 Timing Data Message Manager::
-* DMV177 Timing Data Event Manager::
-* DMV177 Timing Data Signal Manager::
-* DMV177 Timing Data Partition Manager::
-* DMV177 Timing Data Region Manager::
-* DMV177 Timing Data Dual-Ported Memory Manager::
-* DMV177 Timing Data I/O Manager::
-* DMV177 Timing Data Rate Monotonic Manager::
+* RTEMS_BSP Timing Data Introduction::
+* RTEMS_BSP Timing Data Hardware Platform::
+* RTEMS_BSP Timing Data Interrupt Latency::
+* RTEMS_BSP Timing Data Context Switch::
+* RTEMS_BSP Timing Data Directive Times::
+* RTEMS_BSP Timing Data Task Manager::
+* RTEMS_BSP Timing Data Interrupt Manager::
+* RTEMS_BSP Timing Data Clock Manager::
+* RTEMS_BSP Timing Data Timer Manager::
+* RTEMS_BSP Timing Data Semaphore Manager::
+* RTEMS_BSP Timing Data Message Manager::
+* RTEMS_BSP Timing Data Event Manager::
+* RTEMS_BSP Timing Data Signal Manager::
+* RTEMS_BSP Timing Data Partition Manager::
+* RTEMS_BSP Timing Data Region Manager::
+* RTEMS_BSP Timing Data Dual-Ported Memory Manager::
+* RTEMS_BSP Timing Data I/O Manager::
+* RTEMS_BSP Timing Data Rate Monotonic Manager::
@end menu
@end ifinfo
@ifinfo
-@node DMV177 Timing Data Introduction, DMV177 Timing Data Hardware Platform, DMV177 Timing Data, DMV177 Timing Data
+@node RTEMS_BSP Timing Data Introduction, RTEMS_BSP Timing Data Hardware Platform, RTEMS_BSP Timing Data, RTEMS_BSP Timing Data
@end ifinfo
@section Introduction
-The timing data for RTEMS on the DMV177 implementation
-of the PowerPC architecture is provided along with the target
+The timing data for RTEMS on the DY-4 RTEMS_BSP board
+is provided along with the target
dependent aspects concerning the gathering of the timing data.
The hardware platform used to gather the times is described to
give the reader a better understanding of each directive time
@@ -53,28 +55,26 @@ latency and the context switch times as they pertain to the
PowerPC version of RTEMS.
@ifinfo
-@node DMV177 Timing Data Hardware Platform, DMV177 Timing Data Interrupt Latency, DMV177 Timing Data Introduction, DMV177 Timing Data
+@node RTEMS_BSP Timing Data Hardware Platform, RTEMS_BSP Timing Data Interrupt Latency, RTEMS_BSP Timing Data Introduction, RTEMS_BSP Timing Data
@end ifinfo
@section Hardware Platform
-All times reported in this chapter were measured using the PowerPC
-Instruction Simulator (PSIM). PSIM simulates a variety of PowerPC
-6xx models with the DMV177 being used as the basis for the measurements
-reported in this chapter.
+All times reported in this chapter were measured using a RTEMS_BSP board.
The PowerPC decrementer register was was used to gather
-all timing information. In real hardware implementations
-of the PowerPC architecture, this register would typically
-count something like CPU cycles or be a function of the clock
-speed. However, wth PSIM each count of the decrementer register
-represents an instruction. Thus all measurements in this
-chapter are reported as the actual number of instructions
-executed. All sources of hardware interrupts were disabled,
+all timing information. In the PowerPC architecture,
+this register typically counts
+something like CPU cycles or is a function of the clock
+speed. On the PPC603e decrements based on bus cycles.
+This is a very accurate number and given the high clock
+speed of the PowerPC family, Thus all measurements in this
+chapter are reported as the actual number of decrementer
+clicks reported. All sources of hardware interrupts were disabled,
although traps were enabled and the interrupt level of the
PowerPC allows all interrupts.
@ifinfo
-@node DMV177 Timing Data Interrupt Latency, DMV177 Timing Data Context Switch, DMV177 Timing Data Hardware Platform, DMV177 Timing Data
+@node RTEMS_BSP Timing Data Interrupt Latency, RTEMS_BSP Timing Data Context Switch, RTEMS_BSP Timing Data Hardware Platform, RTEMS_BSP Timing Data
@end ifinfo
@section Interrupt Latency
@@ -94,8 +94,9 @@ RTEMS_MAXIMUM_DISABLE_PERIOD_MHZ Mhz.
determined for Release RTEMS_RELEASE_FOR_MAXIMUM_DISABLE_PERIOD.]
The maximum period with interrupts disabled within
-RTEMS is hand-timed with some assistance from PSIM. The maximum
-period with interrupts disabled with RTEMS occurs .... XXX
+RTEMS is hand-timed with some assistance from the PowerPC simulator.
+The maximum period with interrupts disabled with RTEMS has not
+been calculated on this target.
The interrupt vector and entry overhead time was
generated on the PSIM benchmark platform using the PowerPC's
@@ -103,12 +104,12 @@ decrementer register. This register was programmed to generate
an interrupt after one countdown.
@ifinfo
-@node DMV177 Timing Data Context Switch, DMV177 Timing Data Directive Times, DMV177 Timing Data Interrupt Latency, DMV177 Timing Data
+@node RTEMS_BSP Timing Data Context Switch, RTEMS_BSP Timing Data Directive Times, RTEMS_BSP Timing Data Interrupt Latency, RTEMS_BSP Timing Data
@end ifinfo
@section Context Switch
-The RTEMS processor context switch time is XXX
-microseconds on the PSIM benchmark platform when no floating
+The RTEMS processor context switch time is RTEMS_NO_FP_CONTEXTS
+bus cycle on the RTEMS_BSP benchmark platform when no floating
point context is saved or restored. Additional execution time
is required when a TASK_SWITCH user extension is configured.
The use of the TASK_SWITCH extension is application dependent.
@@ -128,7 +129,7 @@ is dispatched, RTEMS does not need to save the current state of
the numeric coprocessor.
The following table summarizes the context switch
-times for the PSIM benchmark platform:
+times for the RTEMS_BSP benchmark platform:
@include timetbldmv177.texi
diff --git a/doc/supplements/powerpc/timePSIM.t b/doc/supplements/powerpc/timePSIM.t
index b4c88fda25..3686614fab 100644
--- a/doc/supplements/powerpc/timePSIM.t
+++ b/doc/supplements/powerpc/timePSIM.t
@@ -1,4 +1,6 @@
@c
+@c Timing information for PSIM
+@c
@c COPYRIGHT (c) 1988-1998.
@c On-Line Applications Research Corporation (OAR).
@c All rights reserved.
@@ -43,8 +45,8 @@
@end ifinfo
@section Introduction
-The timing data for RTEMS on the RTEMS_BSP implementation
-of the PowerPC architecture is provided along with the target
+The timing data for RTEMS on the RTEMS_BSP target board
+is provided along with the target
dependent aspects concerning the gathering of the timing data.
The hardware platform used to gather the times is described to
give the reader a better understanding of each directive time
@@ -66,7 +68,7 @@ The PowerPC decrementer register was was used to gather
all timing information. In real hardware implementations
of the PowerPC architecture, this register would typically
count something like CPU cycles or be a function of the clock
-speed. However, wth PSIM each count of the decrementer register
+speed. However, with PSIM each count of the decrementer register
represents an instruction. Thus all measurements in this
chapter are reported as the actual number of instructions
executed. All sources of hardware interrupts were disabled,
@@ -94,11 +96,12 @@ RTEMS_MAXIMUM_DISABLE_PERIOD_MHZ Mhz.
determined for Release RTEMS_RELEASE_FOR_MAXIMUM_DISABLE_PERIOD.]
The maximum period with interrupts disabled within
-RTEMS is hand-timed with some assistance from PSIM. The maximum
-period with interrupts disabled with RTEMS occurs .... XXX
+RTEMS is hand-timed with some assistance from RTEMS_BSP. The maximum
+period with interrupts disabled with RTEMS occurs was not measured
+on this target.
The interrupt vector and entry overhead time was
-generated on the PSIM benchmark platform using the PowerPC's
+generated on the RTEMS_BSP benchmark platform using the PowerPC's
decrementer register. This register was programmed to generate
an interrupt after one countdown.
@@ -107,8 +110,8 @@ an interrupt after one countdown.
@end ifinfo
@section Context Switch
-The RTEMS processor context switch time is XXX
-microseconds on the PSIM benchmark platform when no floating
+The RTEMS processor context switch time is RTEMS_NO_FP_CONTEXTS
+instructions on the RTEMS_BSP benchmark platform when no floating
point context is saved or restored. Additional execution time
is required when a TASK_SWITCH user extension is configured.
The use of the TASK_SWITCH extension is application dependent.
@@ -128,7 +131,7 @@ is dispatched, RTEMS does not need to save the current state of
the numeric coprocessor.
The following table summarizes the context switch
-times for the PSIM benchmark platform:
+times for the RTEMS_BSP benchmark platform:
@include timetbl.texi
diff --git a/doc/supplements/powerpc/timedata.t b/doc/supplements/powerpc/timedata.t
index b4c88fda25..3686614fab 100644
--- a/doc/supplements/powerpc/timedata.t
+++ b/doc/supplements/powerpc/timedata.t
@@ -1,4 +1,6 @@
@c
+@c Timing information for PSIM
+@c
@c COPYRIGHT (c) 1988-1998.
@c On-Line Applications Research Corporation (OAR).
@c All rights reserved.
@@ -43,8 +45,8 @@
@end ifinfo
@section Introduction
-The timing data for RTEMS on the RTEMS_BSP implementation
-of the PowerPC architecture is provided along with the target
+The timing data for RTEMS on the RTEMS_BSP target board
+is provided along with the target
dependent aspects concerning the gathering of the timing data.
The hardware platform used to gather the times is described to
give the reader a better understanding of each directive time
@@ -66,7 +68,7 @@ The PowerPC decrementer register was was used to gather
all timing information. In real hardware implementations
of the PowerPC architecture, this register would typically
count something like CPU cycles or be a function of the clock
-speed. However, wth PSIM each count of the decrementer register
+speed. However, with PSIM each count of the decrementer register
represents an instruction. Thus all measurements in this
chapter are reported as the actual number of instructions
executed. All sources of hardware interrupts were disabled,
@@ -94,11 +96,12 @@ RTEMS_MAXIMUM_DISABLE_PERIOD_MHZ Mhz.
determined for Release RTEMS_RELEASE_FOR_MAXIMUM_DISABLE_PERIOD.]
The maximum period with interrupts disabled within
-RTEMS is hand-timed with some assistance from PSIM. The maximum
-period with interrupts disabled with RTEMS occurs .... XXX
+RTEMS is hand-timed with some assistance from RTEMS_BSP. The maximum
+period with interrupts disabled with RTEMS occurs was not measured
+on this target.
The interrupt vector and entry overhead time was
-generated on the PSIM benchmark platform using the PowerPC's
+generated on the RTEMS_BSP benchmark platform using the PowerPC's
decrementer register. This register was programmed to generate
an interrupt after one countdown.
@@ -107,8 +110,8 @@ an interrupt after one countdown.
@end ifinfo
@section Context Switch
-The RTEMS processor context switch time is XXX
-microseconds on the PSIM benchmark platform when no floating
+The RTEMS processor context switch time is RTEMS_NO_FP_CONTEXTS
+instructions on the RTEMS_BSP benchmark platform when no floating
point context is saved or restored. Additional execution time
is required when a TASK_SWITCH user extension is configured.
The use of the TASK_SWITCH extension is application dependent.
@@ -128,7 +131,7 @@ is dispatched, RTEMS does not need to save the current state of
the numeric coprocessor.
The following table summarizes the context switch
-times for the PSIM benchmark platform:
+times for the RTEMS_BSP benchmark platform:
@include timetbl.texi
diff --git a/doc/supplements/powerpc/timedatadmv177.t b/doc/supplements/powerpc/timedatadmv177.t
index c96a1f86e1..fdf471bf51 100644
--- a/doc/supplements/powerpc/timedatadmv177.t
+++ b/doc/supplements/powerpc/timedatadmv177.t
@@ -1,4 +1,6 @@
@c
+@c Timing information for the DMV177
+@c
@c COPYRIGHT (c) 1988-1998.
@c On-Line Applications Research Corporation (OAR).
@c All rights reserved.
@@ -12,39 +14,39 @@
@end tex
@ifinfo
-@node DMV177 Timing Data, DMV177 Timing Data Introduction, PSIM Timing Data Rate Monotonic Manager, Top
+@node RTEMS_BSP Timing Data, RTEMS_BSP Timing Data Introduction, PSIM Timing Data Rate Monotonic Manager, Top
@end ifinfo
-@chapter DMV177 Timing Data
+@chapter RTEMS_BSP Timing Data
@ifinfo
@menu
-* DMV177 Timing Data Introduction::
-* DMV177 Timing Data Hardware Platform::
-* DMV177 Timing Data Interrupt Latency::
-* DMV177 Timing Data Context Switch::
-* DMV177 Timing Data Directive Times::
-* DMV177 Timing Data Task Manager::
-* DMV177 Timing Data Interrupt Manager::
-* DMV177 Timing Data Clock Manager::
-* DMV177 Timing Data Timer Manager::
-* DMV177 Timing Data Semaphore Manager::
-* DMV177 Timing Data Message Manager::
-* DMV177 Timing Data Event Manager::
-* DMV177 Timing Data Signal Manager::
-* DMV177 Timing Data Partition Manager::
-* DMV177 Timing Data Region Manager::
-* DMV177 Timing Data Dual-Ported Memory Manager::
-* DMV177 Timing Data I/O Manager::
-* DMV177 Timing Data Rate Monotonic Manager::
+* RTEMS_BSP Timing Data Introduction::
+* RTEMS_BSP Timing Data Hardware Platform::
+* RTEMS_BSP Timing Data Interrupt Latency::
+* RTEMS_BSP Timing Data Context Switch::
+* RTEMS_BSP Timing Data Directive Times::
+* RTEMS_BSP Timing Data Task Manager::
+* RTEMS_BSP Timing Data Interrupt Manager::
+* RTEMS_BSP Timing Data Clock Manager::
+* RTEMS_BSP Timing Data Timer Manager::
+* RTEMS_BSP Timing Data Semaphore Manager::
+* RTEMS_BSP Timing Data Message Manager::
+* RTEMS_BSP Timing Data Event Manager::
+* RTEMS_BSP Timing Data Signal Manager::
+* RTEMS_BSP Timing Data Partition Manager::
+* RTEMS_BSP Timing Data Region Manager::
+* RTEMS_BSP Timing Data Dual-Ported Memory Manager::
+* RTEMS_BSP Timing Data I/O Manager::
+* RTEMS_BSP Timing Data Rate Monotonic Manager::
@end menu
@end ifinfo
@ifinfo
-@node DMV177 Timing Data Introduction, DMV177 Timing Data Hardware Platform, DMV177 Timing Data, DMV177 Timing Data
+@node RTEMS_BSP Timing Data Introduction, RTEMS_BSP Timing Data Hardware Platform, RTEMS_BSP Timing Data, RTEMS_BSP Timing Data
@end ifinfo
@section Introduction
-The timing data for RTEMS on the DMV177 implementation
-of the PowerPC architecture is provided along with the target
+The timing data for RTEMS on the DY-4 RTEMS_BSP board
+is provided along with the target
dependent aspects concerning the gathering of the timing data.
The hardware platform used to gather the times is described to
give the reader a better understanding of each directive time
@@ -53,28 +55,26 @@ latency and the context switch times as they pertain to the
PowerPC version of RTEMS.
@ifinfo
-@node DMV177 Timing Data Hardware Platform, DMV177 Timing Data Interrupt Latency, DMV177 Timing Data Introduction, DMV177 Timing Data
+@node RTEMS_BSP Timing Data Hardware Platform, RTEMS_BSP Timing Data Interrupt Latency, RTEMS_BSP Timing Data Introduction, RTEMS_BSP Timing Data
@end ifinfo
@section Hardware Platform
-All times reported in this chapter were measured using the PowerPC
-Instruction Simulator (PSIM). PSIM simulates a variety of PowerPC
-6xx models with the DMV177 being used as the basis for the measurements
-reported in this chapter.
+All times reported in this chapter were measured using a RTEMS_BSP board.
The PowerPC decrementer register was was used to gather
-all timing information. In real hardware implementations
-of the PowerPC architecture, this register would typically
-count something like CPU cycles or be a function of the clock
-speed. However, wth PSIM each count of the decrementer register
-represents an instruction. Thus all measurements in this
-chapter are reported as the actual number of instructions
-executed. All sources of hardware interrupts were disabled,
+all timing information. In the PowerPC architecture,
+this register typically counts
+something like CPU cycles or is a function of the clock
+speed. On the PPC603e decrements based on bus cycles.
+This is a very accurate number and given the high clock
+speed of the PowerPC family, Thus all measurements in this
+chapter are reported as the actual number of decrementer
+clicks reported. All sources of hardware interrupts were disabled,
although traps were enabled and the interrupt level of the
PowerPC allows all interrupts.
@ifinfo
-@node DMV177 Timing Data Interrupt Latency, DMV177 Timing Data Context Switch, DMV177 Timing Data Hardware Platform, DMV177 Timing Data
+@node RTEMS_BSP Timing Data Interrupt Latency, RTEMS_BSP Timing Data Context Switch, RTEMS_BSP Timing Data Hardware Platform, RTEMS_BSP Timing Data
@end ifinfo
@section Interrupt Latency
@@ -94,8 +94,9 @@ RTEMS_MAXIMUM_DISABLE_PERIOD_MHZ Mhz.
determined for Release RTEMS_RELEASE_FOR_MAXIMUM_DISABLE_PERIOD.]
The maximum period with interrupts disabled within
-RTEMS is hand-timed with some assistance from PSIM. The maximum
-period with interrupts disabled with RTEMS occurs .... XXX
+RTEMS is hand-timed with some assistance from the PowerPC simulator.
+The maximum period with interrupts disabled with RTEMS has not
+been calculated on this target.
The interrupt vector and entry overhead time was
generated on the PSIM benchmark platform using the PowerPC's
@@ -103,12 +104,12 @@ decrementer register. This register was programmed to generate
an interrupt after one countdown.
@ifinfo
-@node DMV177 Timing Data Context Switch, DMV177 Timing Data Directive Times, DMV177 Timing Data Interrupt Latency, DMV177 Timing Data
+@node RTEMS_BSP Timing Data Context Switch, RTEMS_BSP Timing Data Directive Times, RTEMS_BSP Timing Data Interrupt Latency, RTEMS_BSP Timing Data
@end ifinfo
@section Context Switch
-The RTEMS processor context switch time is XXX
-microseconds on the PSIM benchmark platform when no floating
+The RTEMS processor context switch time is RTEMS_NO_FP_CONTEXTS
+bus cycle on the RTEMS_BSP benchmark platform when no floating
point context is saved or restored. Additional execution time
is required when a TASK_SWITCH user extension is configured.
The use of the TASK_SWITCH extension is application dependent.
@@ -128,7 +129,7 @@ is dispatched, RTEMS does not need to save the current state of
the numeric coprocessor.
The following table summarizes the context switch
-times for the PSIM benchmark platform:
+times for the RTEMS_BSP benchmark platform:
@include timetbldmv177.texi