Remove AVR port

closes #2443.

4 files changed, 0 insertions, 142 deletions

diff --git a/doc/cpu_supplement/Makefile.am b/doc/cpu_supplement/Makefile.am
index 4d8ac987a9..ec13a9a661 100644
--- a/doc/cpu_supplement/Makefile.am
+++ b/doc/cpu_supplement/Makefile.am
@@ -13,7 +13,6 @@ REPLACE2 = $(PERL) $(top_srcdir)/tools/word-replace2
 GENERATED_FILES =
 GENERATED_FILES += general.texi
 GENERATED_FILES += arm.texi
-GENERATED_FILES += avr.texi
 GENERATED_FILES += bfin.texi
 GENERATED_FILES += epiphany.texi
 GENERATED_FILES += i386.texi
@@ -51,11 +50,6 @@ arm.texi: arm.t
 	    -u "Top" \
 	    -n "" < $< > $@
 
-avr.texi: avr.t
-	$(BMENU2) -p "" \
-	    -u "Top" \
-	    -n "" < $< > $@
-
 bfin.texi: bfin.t
 	$(BMENU2) -p "" \
 	    -u "Top" \
diff --git a/doc/cpu_supplement/avr.t b/doc/cpu_supplement/avr.t
deleted file mode 100644
index 9ad4d2ef2c..0000000000
--- a/doc/cpu_supplement/avr.t
+++ /dev/null
@@ -1,133 +0,0 @@
-@c
-@c  COPYRIGHT (c) 1988-2009.
-@c  On-Line Applications Research Corporation (OAR).
-@c  All rights reserved.
-
-@ifinfo
-@end ifinfo
-@chapter Atmel AVR Specific Information
-
-This chapter discusses the AVR architecture dependencies in this
-port of RTEMS.
-
-@subheading Architecture Documents
-
-For information on the AVR architecture, refer to the following
-documents available from Atmel.
-
-TBD
-
-@itemize @bullet
-
-@item See other CPUs for documentation reference formatting examples.
-
-@end itemize
-
-
-@section CPU Model Dependent Features
-
-CPUs of the AVR 53X only differ in the peripherals and thus in the
-device drivers. This port does not yet support the 56X dual core variants.
-
-@subsection Count Leading Zeroes Instruction
-
-The AVR CPU has the XXX instruction which could be used to speed
-up the find first bit operation.  The use of this instruction should
-significantly speed up the scheduling associated with a thread blocking.
-
-@section Calling Conventions
-
-@subsection Processor Background
-
-The AVR architecture supports a simple call and return mechanism.
-A subroutine is invoked via the call (@code{call}) instruction.
-This instruction saves the return address in the @code{RETS} register
-and transfers the execution to the given address.
-
-It is the called funcions responsability to use the link instruction
-to reserve space on the stack for the local variables.  Returning from
-a subroutine is done by using the RTS (@code{RTS}) instruction which
-loads the PC with the adress stored in RETS.
-
-It is is important to note that the @code{call} instruction does not
-automatically save or restore any registers.  It is the responsibility
-of the high-level language compiler to define the register preservation
-and usage convention.
-
-@subsection Register Usage
-
-A called function may clobber all registers, except RETS, R4-R7, P3-P5,
-FP and SP.  It may also modify the first 12 bytes in the caller’s stack
-frame which is used as an argument area for the first three arguments
-(which are passed in R0...R3 but may be placed on the stack by the
-called function).
-
-@subsection Parameter Passing
-
-RTEMS assumes that the AVR GCC calling convention is followed.
-The first three parameters are stored in registers R0, R1, and R2.
-All other parameters are put pushed on the stack.  The result is returned
-through register R0.
-
-@section Memory Model
-
-The AVR family architecutre support a single unified 4 GB byte
-address space using 32-bit addresses. It maps all resources like internal
-and external memory and IO registers into separate sections of this
-common address space.
-
-The AVR architcture supports some form of memory
-protection via its Memory Management Unit. Since the
-AVR port runs in supervisior mode this memory
-protection mechanisms are not used.
-
-@section Interrupt Processing
-
-Discussed in this chapter are the AVR's interrupt response and
-control mechanisms as they pertain to RTEMS.
-
-@subsection Vectoring of an Interrupt Handler
-
-TBD
-
-@subsection Disabling of Interrupts by RTEMS
-
-During interrupt disable critical sections, RTEMS disables interrupts to
-level N (N) before the execution of this section and restores them
-to the previous level upon completion of the section. RTEMS uses the
-instructions CLI and STI to enable and disable Interrupts. Emulation,
-Reset, NMI and Exception Interrupts are never disabled.
-
-@subsection Interrupt Stack
-
-The AVR Architecture works with two different kind of stacks,
-User and Supervisor Stack. Since RTEMS and its Application run
-in supervisor mode, all interrupts will use the interrupted
-tasks stack for execution.
-
-@section Default Fatal Error Processing
-
-The default fatal error handler for the AVR performs the following
-actions:
-
-@itemize @bullet
-@item disables processor interrupts,
-@item places the error code in @b{r0}, and
-@item executes an infinite loop (@code{while(0);} to
-simulate a halt processor instruction.
-@end itemize
-
-@section Symmetric Multiprocessing
-
-SMP is not supported.
-
-@section Thread-Local Storage
-
-Thread-local storage is not supported due to a broken tool chain.
-
-@section Board Support Packages
-
-
-@subsection System Reset
-
-TBD
diff --git a/doc/cpu_supplement/cpu_supplement.texi b/doc/cpu_supplement/cpu_supplement.texi
index 52c1a6f0dc..f1c6bd3d15 100644
--- a/doc/cpu_supplement/cpu_supplement.texi
+++ b/doc/cpu_supplement/cpu_supplement.texi
@@ -63,7 +63,6 @@
 * Preface::
 * Port Specific Information::
 * ARM Specific Information::
-* Atmel AVR Specific Information::
 * Blackfin Specific Information::
 * Epiphany Specific Information::
 * Intel/AMD x86 Specific Information::
@@ -86,7 +85,6 @@
 @include preface.texi
 @include general.texi
 @include arm.texi
-@include avr.texi
 @include bfin.texi
 @include epiphany.texi
 @include i386.texi
diff --git a/doc/user/preface.texi b/doc/user/preface.texi
index f8c0728aab..f4a794cbaf 100644
--- a/doc/user/preface.texi
+++ b/doc/user/preface.texi
@@ -148,7 +148,6 @@ It has been ported to the following processor families:
 @itemize @bullet
 @item Altera NIOS II
 @item Analog Devices Blackfin
-@item Atmel AVR
 @item ARM
 @item Freescale (formerly Motorola) MC68xxx 
 @item Freescale (formerly Motorola) MC683xx