2002-02-04 Joel Sherrill <joel@OARcorp.com>

	* bsp.t, BSP_TIMES, callconv.t, ChangeLog, cpumodel.t, cputable.t,
	fatalerr.t, intr_NOTIMES.t, Makefile.am, memmodel.t, mips.texi,
	preface.texi, stamp-vti, timeBSP.t, version.texi: New files.

1 files changed, 39 insertions, 0 deletions

diff --git a/doc/supplements/mips/memmodel.t b/doc/supplements/mips/memmodel.t
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+@c
+@c  COPYRIGHT (c) 1988-2002.
+@c  On-Line Applications Research Corporation (OAR).
+@c  All rights reserved.
+@c
+@c  $Id$
+@c
+
+@chapter Memory Model
+
+@section Introduction
+
+A processor may support any combination of memory
+models ranging from pure physical addressing to complex demand
+paged virtual memory systems.  RTEMS supports a flat memory
+model which ranges contiguously over the processor's allowable
+address space.  RTEMS does not support segmentation or virtual
+memory of any kind.  The appropriate memory model for RTEMS
+provided by the targeted processor and related characteristics
+of that model are described in this chapter.
+
+@section Flat Memory Model
+
+The XXX family supports a flat 32-bit address
+space with addresses ranging from 0x00000000 to 0xFFFFFFFF (4
+gigabytes).  Each address is represented by a 32-bit value and
+is byte addressable.  The address may be used to reference a
+single byte, word (2-bytes), or long word (4 bytes).  Memory
+accesses within this address space are performed in big endian
+fashion by the processors in this family.
+
+Some of the XXX family members such as the
+XXX, XXX, and XXX support virtual memory and
+segmentation.  The XXX requires external hardware support
+such as the XXX Paged Memory Management Unit coprocessor
+which is typically used to perform address translations for
+these systems.  RTEMS does not support virtual memory or
+segmentation on any of the XXX family members.
+