diff options
author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2002-02-14 22:14:59 +0000 |
---|---|---|
committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2002-02-14 22:14:59 +0000 |
commit | 891d63bdddbd0539f031dd680ef62b3e5249b6b7 (patch) | |
tree | e021adc735c5f79b3e9dce6f4b89bdf2e9828b56 /doc/supplements/mips/fatalerr.t | |
parent | 2002-02-13 Ralf Corsepius <corsepiu@faw.uni-ulm.de> (diff) | |
download | rtems-891d63bdddbd0539f031dd680ef62b3e5249b6b7.tar.bz2 |
2002-02-04 Joel Sherrill <joel@OARcorp.com>
* bsp.t, BSP_TIMES, callconv.t, ChangeLog, cpumodel.t, cputable.t,
fatalerr.t, intr_NOTIMES.t, Makefile.am, memmodel.t, mips.texi,
preface.texi, stamp-vti, timeBSP.t, version.texi: New files.
Diffstat (limited to '')
-rw-r--r-- | doc/supplements/mips/fatalerr.t | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/doc/supplements/mips/fatalerr.t b/doc/supplements/mips/fatalerr.t new file mode 100644 index 0000000000..53efad0435 --- /dev/null +++ b/doc/supplements/mips/fatalerr.t @@ -0,0 +1,31 @@ +@c +@c COPYRIGHT (c) 1988-2002. +@c On-Line Applications Research Corporation (OAR). +@c All rights reserved. +@c +@c $Id$ +@c + +@chapter Default Fatal Error Processing + +@section Introduction + +Upon detection of a fatal error by either the +application or RTEMS the fatal error manager is invoked. The +fatal error manager will invoke the user-supplied fatal error +handlers. If no user-supplied handlers are configured, the +RTEMS provided default fatal error handler is invoked. If the +user-supplied fatal error handlers return to the executive the +default fatal error handler is then invoked. This chapter +describes the precise operations of the default fatal error +handler. + +@section Default Fatal Error Handler Operations + +The default fatal error handler which is invoked by +the @code{rtems_fatal_error_occurred} directive when there is +no user handler configured or the user handler returns control to +RTEMS. The default fatal error handler disables processor interrupts, +places the error code in @b{XXX}, and executes a @code{XXX} +instruction to simulate a halt processor instruction. + |