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author | Joel Sherrill <joel.sherrill@OARcorp.com> | 1997-05-27 12:40:11 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 1997-05-27 12:40:11 +0000 |
commit | ae68ff085724dd35d60151bd153e80b8b0776873 (patch) | |
tree | 2f1535a0497f5b872a4744ae13c9264b77e89c11 /doc/supplements/i960/memmodel.t | |
parent | This commit was generated by cvs2svn to compensate for changes in r832, (diff) | |
download | rtems-ae68ff085724dd35d60151bd153e80b8b0776873.tar.bz2 |
Initial revision
Diffstat (limited to '')
-rw-r--r-- | doc/supplements/i960/memmodel.t | 53 | ||||
-rw-r--r-- | doc/supplements/i960/memmodel.texi | 53 |
2 files changed, 106 insertions, 0 deletions
diff --git a/doc/supplements/i960/memmodel.t b/doc/supplements/i960/memmodel.t new file mode 100644 index 0000000000..ce057bc94c --- /dev/null +++ b/doc/supplements/i960/memmodel.t @@ -0,0 +1,53 @@ +@c +@c COPYRIGHT (c) 1988-1997. +@c On-Line Applications Research Corporation (OAR). +@c All rights reserved. +@c + +@ifinfo +@node Memory Model, Memory Model Introduction, Calling Conventions Leaf Procedures, Top +@end ifinfo +@chapter Memory Model +@ifinfo +@menu +* Memory Model Introduction:: +* Memory Model Flat Memory Model:: +@end menu +@end ifinfo + +@ifinfo +@node Memory Model Introduction, Memory Model Flat Memory Model, Memory Model, Memory Model +@end ifinfo +@section Introduction + +A processor may support any combination of memory +models ranging from pure physical addressing to complex demand +paged virtual memory systems. RTEMS supports a flat memory +model which ranges contiguously over the processor's allowable +address space. RTEMS does not support segmentation or virtual +memory of any kind. The appropriate memory model for RTEMS +provided by the targeted processor and related characteristics +of that model are described in this chapter. + +@ifinfo +@node Memory Model Flat Memory Model, Interrupt Processing, Memory Model Introduction, Memory Model +@end ifinfo +@section Flat Memory Model + +The i960CA supports a flat 32-bit address space with +addresses ranging from 0x00000000 to 0xFFFFFFFF (4 gigabytes). +Although the i960CA reserves portions of this address space, +application code and data may be placed in any non-reserved +areas. Each address is represented by a 32-bit value and is +byte addressable. The address may be used to reference a single +byte, half-word (2-bytes), word (4 bytes), double-word (8 +bytes), triple-word (12 bytes) or quad-word (16 bytes). The +i960CA does not support virtual memory or segmentation. + +The i960CA allows the memory space to be partitioned +into sixteen regions which may be configured individually as big +or little endian. RTEMS assumes that the memory regions in +which its code, data, and the RTEMS Workspace reside are +configured as little endian. + + diff --git a/doc/supplements/i960/memmodel.texi b/doc/supplements/i960/memmodel.texi new file mode 100644 index 0000000000..ce057bc94c --- /dev/null +++ b/doc/supplements/i960/memmodel.texi @@ -0,0 +1,53 @@ +@c +@c COPYRIGHT (c) 1988-1997. +@c On-Line Applications Research Corporation (OAR). +@c All rights reserved. +@c + +@ifinfo +@node Memory Model, Memory Model Introduction, Calling Conventions Leaf Procedures, Top +@end ifinfo +@chapter Memory Model +@ifinfo +@menu +* Memory Model Introduction:: +* Memory Model Flat Memory Model:: +@end menu +@end ifinfo + +@ifinfo +@node Memory Model Introduction, Memory Model Flat Memory Model, Memory Model, Memory Model +@end ifinfo +@section Introduction + +A processor may support any combination of memory +models ranging from pure physical addressing to complex demand +paged virtual memory systems. RTEMS supports a flat memory +model which ranges contiguously over the processor's allowable +address space. RTEMS does not support segmentation or virtual +memory of any kind. The appropriate memory model for RTEMS +provided by the targeted processor and related characteristics +of that model are described in this chapter. + +@ifinfo +@node Memory Model Flat Memory Model, Interrupt Processing, Memory Model Introduction, Memory Model +@end ifinfo +@section Flat Memory Model + +The i960CA supports a flat 32-bit address space with +addresses ranging from 0x00000000 to 0xFFFFFFFF (4 gigabytes). +Although the i960CA reserves portions of this address space, +application code and data may be placed in any non-reserved +areas. Each address is represented by a 32-bit value and is +byte addressable. The address may be used to reference a single +byte, half-word (2-bytes), word (4 bytes), double-word (8 +bytes), triple-word (12 bytes) or quad-word (16 bytes). The +i960CA does not support virtual memory or segmentation. + +The i960CA allows the memory space to be partitioned +into sixteen regions which may be configured individually as big +or little endian. RTEMS assumes that the memory regions in +which its code, data, and the RTEMS Workspace reside are +configured as little endian. + + |