2006-08-23 Joel Sherrill <joel@OARcorp.com>

	* Makefile.am, configure.ac, FAQ/stamp-vti, FAQ/version.texi,
	common/cpright.texi: Merging CPU Supplements into a single document.
	As part of this removed the obsolete and impossible to maintain size
	and timing information.
	* cpu_supplement/.cvsignore, cpu_supplement/Makefile.am,
	cpu_supplement/arm.t, cpu_supplement/i386.t, cpu_supplement/m68k.t,
	cpu_supplement/mips.t, cpu_supplement/powerpc.t,
	cpu_supplement/preface.texi, cpu_supplement/sh.t,
	cpu_supplement/sparc.t, cpu_supplement/tic4x.t: New files.
	* supplements/.cvsignore, supplements/Makefile.am,
	supplements/supplement.am, supplements/arm/.cvsignore,
	supplements/arm/BSP_TIMES, supplements/arm/ChangeLog,
	supplements/arm/Makefile.am, supplements/arm/arm.texi,
	supplements/arm/bsp.t, supplements/arm/callconv.t,
	supplements/arm/cpumodel.t, supplements/arm/cputable.t,
	supplements/arm/fatalerr.t, supplements/arm/intr_NOTIMES.t,
	supplements/arm/memmodel.t, supplements/arm/preface.texi,
	supplements/arm/timeBSP.t, supplements/c4x/.cvsignore,
	supplements/c4x/BSP_TIMES, supplements/c4x/ChangeLog,
	supplements/c4x/Makefile.am, supplements/c4x/bsp.t,
	supplements/c4x/c4x.texi, supplements/c4x/callconv.t,
	supplements/c4x/cpumodel.t, supplements/c4x/cputable.t,
	supplements/c4x/fatalerr.t, supplements/c4x/intr_NOTIMES.t,
	supplements/c4x/memmodel.t, supplements/c4x/preface.texi,
	supplements/c4x/timeBSP.t, supplements/i386/.cvsignore,
	supplements/i386/ChangeLog, supplements/i386/FORCE386_TIMES,
	supplements/i386/Makefile.am, supplements/i386/bsp.t,
	supplements/i386/callconv.t, supplements/i386/cpumodel.t,
	supplements/i386/cputable.t, supplements/i386/fatalerr.t,
	supplements/i386/i386.texi, supplements/i386/intr_NOTIMES.t,
	supplements/i386/memmodel.t, supplements/i386/preface.texi,
	supplements/i386/timeFORCE386.t, supplements/m68k/.cvsignore,
	supplements/m68k/ChangeLog, supplements/m68k/MVME136_TIMES,
	supplements/m68k/Makefile.am, supplements/m68k/bsp.t,
	supplements/m68k/callconv.t, supplements/m68k/cpumodel.t,
	supplements/m68k/cputable.t, supplements/m68k/fatalerr.t,
	supplements/m68k/intr_NOTIMES.t, supplements/m68k/m68k.texi,
	supplements/m68k/memmodel.t, supplements/m68k/preface.texi,
	supplements/m68k/timeMVME136.t, supplements/m68k/timedata.t,
	supplements/mips/.cvsignore, supplements/mips/BSP_TIMES,
	supplements/mips/ChangeLog, supplements/mips/Makefile.am,
	supplements/mips/bsp.t, supplements/mips/callconv.t,
	supplements/mips/cpumodel.t, supplements/mips/cputable.t,
	supplements/mips/fatalerr.t, supplements/mips/intr_NOTIMES.t,
	supplements/mips/memmodel.t, supplements/mips/mips.texi,
	supplements/mips/preface.texi, supplements/mips/timeBSP.t,
	supplements/powerpc/.cvsignore, supplements/powerpc/ChangeLog,
	supplements/powerpc/DMV177_TIMES, supplements/powerpc/Makefile.am,
	supplements/powerpc/PSIM_TIMES, supplements/powerpc/bsp.t,
	supplements/powerpc/callconv.t, supplements/powerpc/cpumodel.t,
	supplements/powerpc/cputable.t, supplements/powerpc/fatalerr.t,
	supplements/powerpc/intr_NOTIMES.t, supplements/powerpc/memmodel.t,
	supplements/powerpc/powerpc.texi, supplements/powerpc/preface.texi,
	supplements/powerpc/timeDMV177.t, supplements/powerpc/timePSIM.t,
	supplements/sh/.cvsignore, supplements/sh/BSP_TIMES,
	supplements/sh/ChangeLog, supplements/sh/Makefile.am,
	supplements/sh/bsp.t, supplements/sh/callconv.t,
	supplements/sh/cpumodel.t, supplements/sh/cputable.t,
	supplements/sh/fatalerr.t, supplements/sh/intr_NOTIMES.t,
	supplements/sh/memmodel.t, supplements/sh/preface.texi,
	supplements/sh/sh.texi, supplements/sh/timeBSP.t,
	supplements/sparc/.cvsignore, supplements/sparc/ChangeLog,
	supplements/sparc/ERC32_TIMES, supplements/sparc/Makefile.am,
	supplements/sparc/bsp.t, supplements/sparc/callconv.t,
	supplements/sparc/cpumodel.t, supplements/sparc/cputable.t,
	supplements/sparc/fatalerr.t, supplements/sparc/intr_NOTIMES.t,
	supplements/sparc/memmodel.t, supplements/sparc/preface.texi,
	supplements/sparc/sparc.texi, supplements/sparc/timeERC32.t,
	supplements/template/.cvsignore, supplements/template/BSP_TIMES,
	supplements/template/ChangeLog, supplements/template/Makefile.am,
	supplements/template/bsp.t, supplements/template/callconv.t,
	supplements/template/cpumodel.t, supplements/template/cputable.t,
	supplements/template/fatalerr.t, supplements/template/intr_NOTIMES.t,
	supplements/template/memmodel.t, supplements/template/preface.texi,
	supplements/template/template.texi, supplements/template/timeBSP.t: Removed.

14 files changed, 0 insertions, 1378 deletions

diff --git a/doc/supplements/i386/.cvsignore b/doc/supplements/i386/.cvsignore
deleted file mode 100644
index 0a0639e981..0000000000
--- a/doc/supplements/i386/.cvsignore
+++ /dev/null
@@ -1,31 +0,0 @@
-i386
-i386-?
-i386-??
-i386.aux
-i386.cp
-i386.dvi
-i386.fn
-i386*.html
-i386.ky
-i386.log
-i386.pdf
-i386.pg
-i386.ps
-i386.toc
-i386.tp
-i386.vr
-index.html
-intr.t
-intr.texi
-Makefile
-Makefile.in
-mdate-sh
-rtems_footer.html
-rtems_header.html
-stamp-vti
-timeFORCE386_.t
-timing.t
-timing.texi
-version.texi
-wksheets.t
-wksheets.texi
diff --git a/doc/supplements/i386/ChangeLog b/doc/supplements/i386/ChangeLog
deleted file mode 100644
index 438b5fe127..0000000000
--- a/doc/supplements/i386/ChangeLog
+++ /dev/null
@@ -1,72 +0,0 @@
-2003-12-12	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* Makefile.am: Cosmetics.
-
-2003-12-11	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* Makefile.am: Cosmetics.
-
-2003-11-26	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* Makefile.am: Add *.info to CLEANFILES to accomodate
-	automake-1.7f/1.8 breaking building infos.
-
-2003-09-26	Joel Sherrill <joel@OARcorp.com>
-
-	* cpumodel.t: Obsoleting HP PA-RISC port and removing all references.
-
-2003-09-22	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* Makefile.am: Merger from rtems-4-6-branch.
-
-2003-09-19	Joel Sherrill <joel@OARcorp.com>
-
-	* i386.texi: Merge from branch.
-
-2003-05-22	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* cpumodel.t: Reflect c/src/exec having moved to cpukit.
-
-2003-01-25	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* i386.texi: Set @setfilename i386.info.
-
-2003-01-24	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* Makefile.am: Put GENERATED_FILES into $builddir.
-
-2003-01-22	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* version.texi: Remove from CVS.
-	* stamp-vti: Remove from CVS.
-	* .cvsignore: Add version.texi.
-	Add stamp-vti.
-	Re-sort.
-
-2003-01-21	Joel Sherrill <joel@OARcorp.com>
-
-	* stamp-vti, version.texi: Regenerated.
-
-2002-11-13	Joel Sherrill <joel@OARcorp.com>
-
-	* stamp-vti, version.texi: Regenerated.
-
-2002-10-24	Joel Sherrill <joel@OARcorp.com>
-
-	* stamp-vti, version.texi: Regenerated.
-
-2002-03-27	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* Makefile.am: Remove AUTOMAKE_OPTIONS.
-
-2002-01-18	Ralf Corsepius <corsepiu@faw.uni-ulm.de>
-
-	* Makefile.am: Require automake-1.5.
-
-2001-01-17	Joel Sherrill <joel@OARcorp.com>
-
-	* .cvsignore: Added rtems_header.html and rtems_footer.html.
-
-2000-08-10	Joel Sherrill <joel@OARcorp.com>
-
-	* ChangeLog: New file.
diff --git a/doc/supplements/i386/FORCE386_TIMES b/doc/supplements/i386/FORCE386_TIMES
deleted file mode 100644
index b40f8ad50b..0000000000
--- a/doc/supplements/i386/FORCE386_TIMES
+++ /dev/null
@@ -1,247 +0,0 @@
-#
-#  Intel i386/Force CPU-386 Timing and Size Information
-#
-#  $Id$
-#
-
-#
-#  CPU Model Information
-#
-RTEMS_BSP       CPU386
-RTEMS_CPU_MODEL i386
-#
-#  Interrupt Latency
-#
-#  NOTE:  In general, the text says it is hand-calculated to be
-#         RTEMS_MAXIMUM_DISABLE_PERIOD at RTEMS_MAXIMUM_DISABLE_PERIOD_MHZ
-#         Mhz and this was last calculated for Release 
-#         RTEMS_VERSION_FOR_MAXIMUM_DISABLE_PERIOD.
-#
-RTEMS_MAXIMUM_DISABLE_PERIOD 13.0
-RTEMS_MAXIMUM_DISABLE_PERIOD_MHZ 16
-RTEMS_RELEASE_FOR_MAXIMUM_DISABLE_PERIOD 3.1.0
-#
-#  Context Switch Times
-#
-RTEMS_NO_FP_CONTEXTS 34
-RTEMS_RESTORE_1ST_FP_TASK 57
-RTEMS_SAVE_INIT_RESTORE_INIT 59
-RTEMS_SAVE_IDLE_RESTORE_INIT 59
-RTEMS_SAVE_IDLE_RESTORE_IDLE 83
-#
-#  Task Manager Times
-#
-RTEMS_TASK_CREATE_ONLY 157
-RTEMS_TASK_IDENT_ONLY 748
-RTEMS_TASK_START_ONLY 86
-RTEMS_TASK_RESTART_CALLING_TASK 118
-RTEMS_TASK_RESTART_SUSPENDED_RETURNS_TO_CALLER 45
-RTEMS_TASK_RESTART_BLOCKED_RETURNS_TO_CALLER 138
-RTEMS_TASK_RESTART_READY_RETURNS_TO_CALLER 105
-RTEMS_TASK_RESTART_SUSPENDED_PREEMPTS_CALLER 149
-RTEMS_TASK_RESTART_BLOCKED_PREEMPTS_CALLER 162
-RTEMS_TASK_RESTART_READY_PREEMPTS_CALLER 156
-RTEMS_TASK_DELETE_CALLING_TASK 187
-RTEMS_TASK_DELETE_SUSPENDED_TASK 147
-RTEMS_TASK_DELETE_BLOCKED_TASK 153
-RTEMS_TASK_DELETE_READY_TASK 157
-RTEMS_TASK_SUSPEND_CALLING_TASK 81
-RTEMS_TASK_SUSPEND_RETURNS_TO_CALLER 45
-RTEMS_TASK_RESUME_TASK_READIED_RETURNS_TO_CALLER 46
-RTEMS_TASK_RESUME_TASK_READIED_PREEMPTS_CALLER 71
-RTEMS_TASK_SET_PRIORITY_OBTAIN_CURRENT_PRIORITY 30
-RTEMS_TASK_SET_PRIORITY_RETURNS_TO_CALLER 67
-RTEMS_TASK_SET_PRIORITY_PREEMPTS_CALLER 115
-RTEMS_TASK_MODE_OBTAIN_CURRENT_MODE 19
-RTEMS_TASK_MODE_NO_RESCHEDULE 21
-RTEMS_TASK_MODE_RESCHEDULE_RETURNS_TO_CALLER 27
-RTEMS_TASK_MODE_RESCHEDULE_PREEMPTS_CALLER 66
-RTEMS_TASK_GET_NOTE_ONLY 32
-RTEMS_TASK_SET_NOTE_ONLY 32
-RTEMS_TASK_WAKE_AFTER_YIELD_RETURNS_TO_CALLER 18
-RTEMS_TASK_WAKE_AFTER_YIELD_PREEMPTS_CALLER 63
-RTEMS_TASK_WAKE_WHEN_ONLY 128
-#
-#  Interrupt Manager
-#
-RTEMS_INTR_ENTRY_RETURNS_TO_NESTED 12
-RTEMS_INTR_ENTRY_RETURNS_TO_INTERRUPTED_TASK 13
-RTEMS_INTR_ENTRY_RETURNS_TO_PREEMPTING_TASK 12
-RTEMS_INTR_EXIT_RETURNS_TO_NESTED 10
-RTEMS_INTR_EXIT_RETURNS_TO_INTERRUPTED_TASK 13
-RTEMS_INTR_EXIT_RETURNS_TO_PREEMPTING_TASK 58
-#
-#  Clock Manager
-#
-RTEMS_CLOCK_SET_ONLY 85
-RTEMS_CLOCK_GET_ONLY 2
-RTEMS_CLOCK_TICK_ONLY 16
-#
-#  Timer Manager
-#
-RTEMS_TIMER_CREATE_ONLY 34
-RTEMS_TIMER_IDENT_ONLY 729
-RTEMS_TIMER_DELETE_INACTIVE 48
-RTEMS_TIMER_DELETE_ACTIVE 52
-RTEMS_TIMER_FIRE_AFTER_INACTIVE 65
-RTEMS_TIMER_FIRE_AFTER_ACTIVE 69
-RTEMS_TIMER_FIRE_WHEN_INACTIVE 92
-RTEMS_TIMER_FIRE_WHEN_ACTIVE 92
-RTEMS_TIMER_RESET_INACTIVE 58
-RTEMS_TIMER_RESET_ACTIVE 63
-RTEMS_TIMER_CANCEL_INACTIVE 32
-RTEMS_TIMER_CANCEL_ACTIVE 37
-#
-#  Semaphore Manager
-#
-RTEMS_SEMAPHORE_CREATE_ONLY 64
-RTEMS_SEMAPHORE_IDENT_ONLY 787
-RTEMS_SEMAPHORE_DELETE_ONLY 60
-RTEMS_SEMAPHORE_OBTAIN_AVAILABLE 41
-RTEMS_SEMAPHORE_OBTAIN_NOT_AVAILABLE_NO_WAIT 40
-RTEMS_SEMAPHORE_OBTAIN_NOT_AVAILABLE_CALLER_BLOCKS 123
-RTEMS_SEMAPHORE_RELEASE_NO_WAITING_TASKS 47
-RTEMS_SEMAPHORE_RELEASE_TASK_READIED_RETURNS_TO_CALLER 70
-RTEMS_SEMAPHORE_RELEASE_TASK_READIED_PREEMPTS_CALLER 95
-#
-#  Message Manager
-#
-RTEMS_MESSAGE_QUEUE_CREATE_ONLY 294
-RTEMS_MESSAGE_QUEUE_IDENT_ONLY 730
-RTEMS_MESSAGE_QUEUE_DELETE_ONLY 81
-RTEMS_MESSAGE_QUEUE_SEND_NO_WAITING_TASKS 117
-RTEMS_MESSAGE_QUEUE_SEND_TASK_READIED_RETURNS_TO_CALLER 118
-RTEMS_MESSAGE_QUEUE_SEND_TASK_READIED_PREEMPTS_CALLER 144
-RTEMS_MESSAGE_QUEUE_URGENT_NO_WAITING_TASKS 117
-RTEMS_MESSAGE_QUEUE_URGENT_TASK_READIED_RETURNS_TO_CALLER 116
-RTEMS_MESSAGE_QUEUE_URGENT_TASK_READIED_PREEMPTS_CALLER 144
-RTEMS_MESSAGE_QUEUE_BROADCAST_NO_WAITING_TASKS 53
-RTEMS_MESSAGE_QUEUE_BROADCAST_TASK_READIED_RETURNS_TO_CALLER 122
-RTEMS_MESSAGE_QUEUE_BROADCAST_TASK_READIED_PREEMPTS_CALLER 146
-RTEMS_MESSAGE_QUEUE_RECEIVE_AVAILABLE 93
-RTEMS_MESSAGE_QUEUE_RECEIVE_NOT_AVAILABLE_NO_WAIT 45
-RTEMS_MESSAGE_QUEUE_RECEIVE_NOT_AVAILABLE_CALLER_BLOCKS 127
-RTEMS_MESSAGE_QUEUE_FLUSH_NO_MESSAGES_FLUSHED 29
-RTEMS_MESSAGE_QUEUE_FLUSH_MESSAGES_FLUSHED 41
-#
-#  Event Manager
-#
-RTEMS_EVENT_SEND_NO_TASK_READIED 26
-RTEMS_EVENT_SEND_TASK_READIED_RETURNS_TO_CALLER 60
-RTEMS_EVENT_SEND_TASK_READIED_PREEMPTS_CALLER 89
-RTEMS_EVENT_RECEIVE_OBTAIN_CURRENT_EVENTS <1
-RTEMS_EVENT_RECEIVE_AVAILABLE 27
-RTEMS_EVENT_RECEIVE_NOT_AVAILABLE_NO_WAIT 25
-RTEMS_EVENT_RECEIVE_NOT_AVAILABLE_CALLER_BLOCKS 94
-#
-#  Signal Manager
-#
-RTEMS_SIGNAL_CATCH_ONLY 13
-RTEMS_SIGNAL_SEND_RETURNS_TO_CALLER 34
-RTEMS_SIGNAL_SEND_SIGNAL_TO_SELF 59
-RTEMS_SIGNAL_EXIT_ASR_OVERHEAD_RETURNS_TO_CALLING_TASK 39
-RTEMS_SIGNAL_EXIT_ASR_OVERHEAD_RETURNS_TO_PREEMPTING_TASK 60
-#
-#  Partition Manager
-#
-RTEMS_PARTITION_CREATE_ONLY 83
-RTEMS_PARTITION_IDENT_ONLY 730
-RTEMS_PARTITION_DELETE_ONLY 40
-RTEMS_PARTITION_GET_BUFFER_AVAILABLE 34
-RTEMS_PARTITION_GET_BUFFER_NOT_AVAILABLE 33
-RTEMS_PARTITION_RETURN_BUFFER_ONLY 40
-#
-#  Region Manager
-#
-RTEMS_REGION_CREATE_ONLY 68
-RTEMS_REGION_IDENT_ONLY 739
-RTEMS_REGION_DELETE_ONLY 39
-RTEMS_REGION_GET_SEGMENT_AVAILABLE 49
-RTEMS_REGION_GET_SEGMENT_NOT_AVAILABLE_NO_WAIT 45
-RTEMS_REGION_GET_SEGMENT_NOT_AVAILABLE_CALLER_BLOCKS 127
-RTEMS_REGION_RETURN_SEGMENT_NO_WAITING_TASKS 52
-RTEMS_REGION_RETURN_SEGMENT_TASK_READIED_RETURNS_TO_CALLER 113
-RTEMS_REGION_RETURN_SEGMENT_TASK_READIED_PREEMPTS_CALLER 138
-#
-#  Dual-Ported Memory Manager
-#
-RTEMS_PORT_CREATE_ONLY 39
-RTEMS_PORT_IDENT_ONLY 728
-RTEMS_PORT_DELETE_ONLY 39
-RTEMS_PORT_INTERNAL_TO_EXTERNAL_ONLY 26
-RTEMS_PORT_EXTERNAL_TO_INTERNAL_ONLY 26
-#
-#  IO Manager
-#
-RTEMS_IO_INITIALIZE_ONLY 4
-RTEMS_IO_OPEN_ONLY 1
-RTEMS_IO_CLOSE_ONLY 1
-RTEMS_IO_READ_ONLY <1
-RTEMS_IO_WRITE_ONLY 1
-RTEMS_IO_CONTROL_ONLY 1
-#
-#  Rate Monotonic Manager
-#
-RTEMS_RATE_MONOTONIC_CREATE_ONLY 36
-RTEMS_RATE_MONOTONIC_IDENT_ONLY 725
-RTEMS_RATE_MONOTONIC_CANCEL_ONLY 39
-RTEMS_RATE_MONOTONIC_DELETE_ACTIVE 53
-RTEMS_RATE_MONOTONIC_DELETE_INACTIVE 49
-RTEMS_RATE_MONOTONIC_PERIOD_INITIATE_PERIOD_RETURNS_TO_CALLER 53
-RTEMS_RATE_MONOTONIC_PERIOD_CONCLUDE_PERIOD_CALLER_BLOCKS 82
-RTEMS_RATE_MONOTONIC_PERIOD_OBTAIN_STATUS 30
-#
-#  Size Information
-#
-#
-#  xxx alloted for numbers
-#
-RTEMS_DATA_SPACE 833
-RTEMS_MINIMUM_CONFIGURATION 22,660
-RTEMS_MAXIMUM_CONFIGURATION 39,592
-#  x,xxx alloted for numbers
-RTEMS_CORE_CODE_SIZE 16,948
-RTEMS_INITIALIZATION_CODE_SIZE 916
-RTEMS_TASK_CODE_SIZE 3,436
-RTEMS_INTERRUPT_CODE_SIZE 52
-RTEMS_CLOCK_CODE_SIZE 296
-RTEMS_TIMER_CODE_SIZE 1,084
-RTEMS_SEMAPHORE_CODE_SIZE 1,500
-RTEMS_MESSAGE_CODE_SIZE 1,596
-RTEMS_EVENT_CODE_SIZE 1,036
-RTEMS_SIGNAL_CODE_SIZE 396
-RTEMS_PARTITION_CODE_SIZE 1,052
-RTEMS_REGION_CODE_SIZE 1,392
-RTEMS_DPMEM_CODE_SIZE 664
-RTEMS_IO_CODE_SIZE 676
-RTEMS_FATAL_ERROR_CODE_SIZE 20
-RTEMS_RATE_MONOTONIC_CODE_SIZE 1,132
-RTEMS_MULTIPROCESSING_CODE_SIZE 6,840
-#  xxx alloted for numbers
-RTEMS_TIMER_CODE_OPTSIZE 144
-RTEMS_SEMAPHORE_CODE_OPTSIZE 136
-RTEMS_MESSAGE_CODE_OPTSIZE 224
-RTEMS_EVENT_CODE_OPTSIZE 44
-RTEMS_SIGNAL_CODE_OPTSIZE 44
-RTEMS_PARTITION_CODE_OPTSIZE 104
-RTEMS_REGION_CODE_OPTSIZE 124
-RTEMS_DPMEM_CODE_OPTSIZE 104
-RTEMS_IO_CODE_OPTSIZE 00
-RTEMS_RATE_MONOTONIC_CODE_OPTSIZE 136
-RTEMS_MULTIPROCESSING_CODE_OPTSIZE 228
-#  xxx alloted for numbers
-RTEMS_BYTES_PER_TASK 372
-RTEMS_BYTES_PER_TIMER 68
-RTEMS_BYTES_PER_SEMAPHORE 124
-RTEMS_BYTES_PER_MESSAGE_QUEUE 148
-RTEMS_BYTES_PER_REGION 144
-RTEMS_BYTES_PER_PARTITION 56
-RTEMS_BYTES_PER_PORT 36
-RTEMS_BYTES_PER_PERIOD 36
-RTEMS_BYTES_PER_EXTENSION 64
-RTEMS_BYTES_PER_FP_TASK 108
-RTEMS_BYTES_PER_NODE 48
-RTEMS_BYTES_PER_GLOBAL_OBJECT 20
-RTEMS_BYTES_PER_PROXY 124
-#  x,xxx alloted for numbers
-RTEMS_BYTES_OF_FIXED_SYSTEM_REQUIREMENTS 6,768
diff --git a/doc/supplements/i386/Makefile.am b/doc/supplements/i386/Makefile.am
deleted file mode 100644
index a8a27d839b..0000000000
--- a/doc/supplements/i386/Makefile.am
+++ /dev/null
@@ -1,111 +0,0 @@
-#
-#  COPYRIGHT (c) 1988-2002.
-#  On-Line Applications Research Corporation (OAR).
-#  All rights reserved.
-#
-#  $Id$
-#
-
-PROJECT = i386
-EDITION = 1
-
-include $(top_srcdir)/project.am
-include $(top_srcdir)/supplements/supplement.am
-
-GENERATED_FILES = cpumodel.texi callconv.texi memmodel.texi intr.texi \
-    fatalerr.texi bsp.texi cputable.texi timing.texi wksheets.texi \
-    timeFORCE386.texi
-
-COMMON_FILES += $(top_srcdir)/common/cpright.texi \
-    $(top_srcdir)/common/timemac.texi
-
-FILES = preface.texi
-
-info_TEXINFOS = i386.texi
-i386_TEXINFOS = $(FILES) $(COMMON_FILES) $(GENERATED_FILES)
-
-#
-#  Chapters which get automatic processing
-#
-
-cpumodel.texi: cpumodel.t
-	$(BMENU2) -p "Preface" \
-	    -u "Top" \
-	    -n "Calling Conventions" < $< > $@
-
-callconv.texi: callconv.t
-	$(BMENU2) -p "CPU Model Dependent Features Floating Point Unit" \
-	    -u "Top" \
-	    -n "Memory Model" < $< > $@
-
-memmodel.texi: memmodel.t
-	$(BMENU2) -p "Calling Conventions User-Provided Routines" \
-	    -u "Top" \
-	    -n "Interrupt Processing" < $< > $@
-
-# Interrupt Chapter:
-#  1.  Replace Times and Sizes
-#  2.  Build Node Structure
-
-intr.texi: intr_NOTIMES.t FORCE386_TIMES
-	${REPLACE2} -p $(srcdir)/FORCE386_TIMES $(srcdir)/intr_NOTIMES.t | \
-	$(BMENU2) -p "Memory Model Flat Memory Model" \
-	    -u "Top" \
-	    -n "Default Fatal Error Processing" > $@
-
-fatalerr.texi: fatalerr.t
-	$(BMENU2) -p "Interrupt Processing Interrupt Stack" \
-	    -u "Top" \
-	    -n "Board Support Packages" < $< > $@
-
-bsp.texi: bsp.t
-	$(BMENU2) -p "Default Fatal Error Processing Default Fatal Error Handler Operations" \
-	    -u "Top" \
-	    -n "Processor Dependent Information Table" < $< > $@
-
-cputable.texi: cputable.t
-	$(BMENU2) -p "Board Support Packages Processor Initialization" \
-	    -u "Top" \
-	    -n "Memory Requirements" < $< > $@
-
-# Worksheets Chapter:
-#  1.  Obtain the Shared File
-#  2.  Replace Times and Sizes
-#  3.  Build Node Structure
-
-wksheets.texi: $(top_srcdir)/common/wksheets.t FORCE386_TIMES
-	${REPLACE2} -p $(srcdir)/FORCE386_TIMES \
-          $(top_srcdir)/common/wksheets.t | \
-	$(BMENU2) -p "Processor Dependent Information Table CPU Dependent Information Table" \
-	    -u "Top" \
-	    -n "Timing Specification" > $@
-
-# Timing Specification Chapter:
-#  1.  Copy the Shared File
-#  3.  Build Node Structure
-timing.texi: $(top_srcdir)/common/timing.t
-	$(BMENU2) -p "Memory Requirements RTEMS RAM Workspace Worksheet" \
-            -u "Top" \
-            -n "CPU386 Timing Data" < $< > $@
-
-# Timing Data for BSP Chapter:
-#  1.  Copy the Shared File
-#  2.  Replace Times and Sizes
-#  3.  Build Node Structure
-
-timeFORCE386.texi: $(top_srcdir)/common/timetbl.t timeFORCE386.t
-	cat $(srcdir)/timeFORCE386.t $(top_srcdir)/common/timetbl.t   >timeFORCE386_.t
-	@echo                                               >>timeFORCE386_.t
-	@echo "@tex"                                        >>timeFORCE386_.t
-	@echo "\\global\\advance \\smallskipamount by 4pt"  >>timeFORCE386_.t
-	@echo "@end tex"                                    >>timeFORCE386_.t
-	${REPLACE2} -p $(srcdir)/FORCE386_TIMES timeFORCE386_.t | \
-	$(BMENU2) -p "Timing Specification Terminology" \
-	    -u "Top" \
-	    -n "Command and Variable Index" > $@
-CLEANFILES += timeFORCE386_.t
-
-EXTRA_DIST = FORCE386_TIMES bsp.t callconv.t cpumodel.t cputable.t \
-    fatalerr.t intr_NOTIMES.t memmodel.t timeFORCE386.t
-
-CLEANFILES += i386.info i386.info-?
diff --git a/doc/supplements/i386/bsp.t b/doc/supplements/i386/bsp.t
deleted file mode 100644
index 9ac99901f1..0000000000
--- a/doc/supplements/i386/bsp.t
+++ /dev/null
@@ -1,109 +0,0 @@
-@c
-@c  COPYRIGHT (c) 1988-2002.
-@c  On-Line Applications Research Corporation (OAR).
-@c  All rights reserved.
-@c
-@c  $Id$
-@c
-
-@chapter Board Support Packages
-
-@section Introduction
-
-An RTEMS Board Support Package (BSP) must be designed to support a
-particular processor and target board combination.  This chapter presents a
-discussion of i386 specific BSP issues.  For more information on developing
-a BSP, refer to the chapter titled Board Support Packages in the RTEMS
-Applications User's Guide. 
-
-@section System Reset
-
-An RTEMS based application is initiated when the i386
-processor is reset.  When the i386 is reset,
-
-@itemize @bullet
-
-@item The EAX register is set to indicate the results of the processor's
-power-up self test.  If the self-test was not executed, the contents of
-this register are undefined.  Otherwise, a non-zero value indicates the
-processor is faulty and a zero value indicates a successful self-test.
-
-@item The DX register holds a component identifier and revision level.  DH
-contains 3 to indicate an i386 component and DL contains a unique revision
-level indicator. 
-
-@item Control register zero (CR0) is set such that the processor is in real
-mode with paging disabled.  Other portions of CR0 are used to indicate the
-presence of a numeric coprocessor. 
-
-@item All bits in the extended flags register (EFLAG) which are not
-permanently set are cleared.  This inhibits all maskable interrupts. 
-
-@item The Interrupt Descriptor Register (IDTR) is set to point at address
-zero. 
-
-@item All segment registers are set to zero. 
-
-@item The instruction pointer is set to 0x0000FFF0.  The first instruction
-executed after a reset is actually at 0xFFFFFFF0 because the i386 asserts
-the upper twelve address until the first intersegment (FAR) JMP or CALL
-instruction.  When a JMP or CALL is executed, the upper twelve address
-lines are lowered and the processor begins executing in the first megabyte
-of memory.
-
-@end itemize
-
-Typically, an intersegment JMP to the application's initialization code is
-placed at address 0xFFFFFFF0. 
-
-@section Processor Initialization
-
-This initialization code is responsible for initializing all data
-structures required by the i386 in protected mode and for actually entering
-protected mode.  The i386 must be placed in protected mode and the segment
-registers and associated selectors must be initialized before the
-initialize_executive directive is invoked. 
-
-The initialization code is responsible for initializing the Global
-Descriptor Table such that the i386 is in the thirty-two bit flat memory
-model with paging disabled.  In this mode, the i386 automatically converts
-every address from a logical to a physical address each time it is used. 
-For more information on the memory model used by RTEMS, please refer to the
-Memory Model chapter in this document. 
-
-Since the processor is in real mode upon reset, the processor must be
-switched to protected mode before RTEMS can execute.  Before switching to
-protected mode, at least one descriptor table and two descriptors must be
-created.  Descriptors are needed for a code segment and a data segment. (
-This will give you the flat memory model.)  The stack can be placed in a
-normal read/write data segment, so no descriptor for the stack is needed.
-Before the GDT can be used, the base address and limit must be loaded into
-the GDTR register using an LGDT instruction. 
-
-If the hardware allows an NMI to be generated, you need to create the IDT
-and a gate for the NMI interrupt handler.  Before the IDT can be used, the
-base address and limit for the idt must be loaded into the IDTR register
-using an LIDT instruction. 
-
-Protected mode is entered by setting thye PE bit in the CR0 register. 
-Either a LMSW or MOV CR0 instruction may be used to set this bit. Because
-the processor overlaps the interpretation of several instructions, it is
-necessary to discard the instructions from the read-ahead cache. A JMP
-instruction immediately after the LMSW changes the flow and empties the
-processor if intructions which have been pre-fetched and/or decoded.  At
-this point, the processor is in protected mode and begins to perform
-protected mode application initialization.
-
-If the application requires that the IDTR be some value besides zero, then
-it should set it to the required value at this point.  All tasks share the
-same i386 IDTR value.  Because interrupts are enabled automatically by
-RTEMS as part of the initialize_executive directive, the IDTR MUST be set
-properly before this directive is invoked to insure correct interrupt
-vectoring.  If processor caching is to be utilized, then it should be
-enabled during the reset application initialization code.  The reset code
-which is executed before the call to initialize_executive has the following
-requirements:
-
-For more information regarding the i386s data structures and their
-contents, refer to Intel's 386 Programmer's Reference Manual.
-
diff --git a/doc/supplements/i386/callconv.t b/doc/supplements/i386/callconv.t
deleted file mode 100644
index f3e428dfad..0000000000
--- a/doc/supplements/i386/callconv.t
+++ /dev/null
@@ -1,90 +0,0 @@
-@c
-@c  COPYRIGHT (c) 1988-2002.
-@c  On-Line Applications Research Corporation (OAR).
-@c  All rights reserved.
-@c
-@c  $Id$
-@c
-
-@chapter Calling Conventions
-
-@section Introduction
-
-Each high-level language compiler generates
-subroutine entry and exit code based upon a set of rules known
-as the compiler's calling convention.   These rules address the
-following issues:
-
-@itemize @bullet
-@item register preservation and usage
-
-@item parameter passing
-
-@item call and return mechanism
-@end itemize
-
-A compiler's calling convention is of importance when
-interfacing to subroutines written in another language either
-assembly or high-level.  Even when the high-level language and
-target processor are the same, different compilers may use
-different calling conventions.  As a result, calling conventions
-are both processor and compiler dependent.
-
-@section Processor Background
-
-The i386 architecture supports a simple yet effective
-call and return mechanism.  A subroutine is invoked via the call
-(call) instruction.  This instruction pushes the return address
-on the stack.  The return from subroutine (ret) instruction pops
-the return address off the current stack and transfers control
-to that instruction.  It is is important to note that the i386
-call and return mechanism does not automatically save or restore
-any registers.  It is the responsibility of the high-level
-language compiler to define the register preservation and usage
-convention.
-
-@section Calling Mechanism
-
-All RTEMS directives are invoked using a call
-instruction and return to the user application via the ret
-instruction.
-
-@section Register Usage
-
-As discussed above, the call instruction does not
-automatically save any registers.  RTEMS uses the registers EAX,
-ECX, and EDX as scratch registers.  These registers are not
-preserved by RTEMS directives therefore, the contents of these
-registers should not be assumed upon return from any RTEMS
-directive.
-
-@section Parameter Passing
-
-RTEMS assumes that arguments are placed on the
-current stack before the directive is invoked via the call
-instruction.  The first argument is assumed to be closest to the
-return address on the stack.  This means that the first argument
-of the C calling sequence is pushed last.  The following
-pseudo-code illustrates the typical sequence used to call a
-RTEMS directive with three (3) arguments:
-
-@example
-push third argument
-push second argument
-push first argument
-invoke directive
-remove arguments from the stack
-@end example
-
-The arguments to RTEMS are typically pushed onto the
-stack using a push instruction.  These arguments must be removed
-from the stack after control is returned to the caller.  This
-removal is typically accomplished by adding the size of the
-argument list in bytes to the stack pointer.
-
-@section User-Provided Routines
-
-All user-provided routines invoked by RTEMS, such as
-user extensions, device drivers, and MPCI routines, must also
-adhere to these calling conventions.
-
diff --git a/doc/supplements/i386/cpumodel.t b/doc/supplements/i386/cpumodel.t
deleted file mode 100644
index 30109f23a2..0000000000
--- a/doc/supplements/i386/cpumodel.t
+++ /dev/null
@@ -1,72 +0,0 @@
-@c
-@c  COPYRIGHT (c) 1988-2002.
-@c  On-Line Applications Research Corporation (OAR).
-@c  All rights reserved.
-@c
-@c  $Id$
-@c
-
-@chapter CPU Model Dependent Features
-
-@section Introduction
-
-Microprocessors are generally classified into
-families with a variety of CPU models or implementations within
-that family.  Within a processor family, there is a high level
-of binary compatibility.  This family may be based on either an
-architectural specification or on maintaining compatibility with
-a popular processor.  Recent microprocessor families such as the
-SPARC or PowerPC are based on an architectural specification
-which is independent or any particular CPU model or
-implementation.  Older families such as the M68xxx and the iX86
-evolved as the manufacturer strived to produce higher
-performance processor models which maintained binary
-compatibility with older models.
-
-RTEMS takes advantage of the similarity of the
-various models within a CPU family.  Although the models do vary
-in significant ways, the high level of compatibility makes it
-possible to share the bulk of the CPU dependent executive code
-across the entire family.  Each processor family supported by
-RTEMS has a list of features which vary between CPU models
-within a family.  For example, the most common model dependent
-feature regardless of CPU family is the presence or absence of a
-floating point unit or coprocessor.  When defining the list of
-features present on a particular CPU model, one simply notes
-that floating point hardware is or is not present and defines a
-single constant appropriately.  Conditional compilation is
-utilized to include the appropriate source code for this CPU
-model's feature set.  It is important to note that this means
-that RTEMS is thus compiled using the appropriate feature set
-and compilation flags optimal for this CPU model used.  The
-alternative would be to generate a binary which would execute on
-all family members using only the features which were always
-present.
-
-This chapter presents the set of features which vary
-across i386 implementations and are of importance to RTEMS.
-The set of CPU model feature macros are defined in the file
-cpukit/score/cpu/i386/i386.h based upon the particular CPU
-model defined on the compilation command line.
-
-@section CPU Model Name
-
-The macro CPU_MODEL_NAME is a string which designates
-the name of this CPU model.  For example, for the Intel i386 without an
-i387 coprocessor, this macro is set to the string "i386 with i387".
-
-@section bswap Instruction
-
-The macro I386_HAS_BSWAP is set to 1 to indicate that
-this CPU model has the @code{bswap} instruction which
-endian swaps a thirty-two bit quantity.  This instruction
-appears to be present in all CPU models
-i486's and above.
-
-@section Floating Point Unit
-
-The macro I386_HAS_FPU is set to 1 to indicate that
-this CPU model has a hardware floating point unit and 0
-otherwise.  The hardware floating point may be on-chip (as in the
-case of an i486DX or Pentium) or as a coprocessor (as in the case of
-an i386/i387 combination).
diff --git a/doc/supplements/i386/cputable.t b/doc/supplements/i386/cputable.t
deleted file mode 100644
index e7dbf045aa..0000000000
--- a/doc/supplements/i386/cputable.t
+++ /dev/null
@@ -1,119 +0,0 @@
-@c
-@c  COPYRIGHT (c) 1988-2002.
-@c  On-Line Applications Research Corporation (OAR).
-@c  All rights reserved.
-@c
-@c  $Id$
-@c
-
-@chapter Processor Dependent Information Table
-
-@section Introduction
-
-Any highly processor dependent information required
-to describe a processor to RTEMS is provided in the CPU
-Dependent Information Table.  This table is not required for all
-processors supported by RTEMS.  This chapter describes the
-contents, if any, for a particular processor type.
-
-@section CPU Dependent Information Table
-
-The i386 version of the RTEMS CPU Dependent
-Information Table contains the information required to interface
-a Board Support Package and RTEMS on the i386.  This information
-is provided to allow RTEMS to interoperate effectively with the
-BSP.  The C structure definition is given here:
-
-@example
-@group
-typedef struct @{
-  void       (*pretasking_hook)( void );
-  void       (*predriver_hook)( void );
-  void       (*idle_task)( void );
-  boolean      do_zero_of_workspace;
-  unsigned32   idle_task_stack_size;
-  unsigned32   interrupt_stack_size;
-  unsigned32   extra_mpci_receive_server_stack;
-  void *     (*stack_allocate_hook)( unsigned32 );
-  void       (*stack_free_hook)( void* );
-  /* end of fields required on all CPUs */
- 
-  unsigned32   interrupt_segment;
-  void        *interrupt_vector_table;
-@} rtems_cpu_table;
-@end group
-@end example
-
-@table @code
-@item pretasking_hook
-is the address of the user provided routine which is invoked
-once RTEMS APIs are initialized.  This routine will be invoked
-before any system tasks are created.  Interrupts are disabled.
-This field may be NULL to indicate that the hook is not utilized.
-
-@item predriver_hook
-is the address of the user provided
-routine that is invoked immediately before the
-the device drivers and MPCI are initialized. RTEMS
-initialization is complete but interrupts and tasking are disabled.
-This field may be NULL to indicate that the hook is not utilized.
-
-@item postdriver_hook
-is the address of the user provided
-routine that is invoked immediately after the
-the device drivers and MPCI are initialized. RTEMS
-initialization is complete but interrupts and tasking are disabled.
-This field may be NULL to indicate that the hook is not utilized.
-
-@item idle_task
-is the address of the optional user
-provided routine which is used as the system's IDLE task.  If
-this field is not NULL, then the RTEMS default IDLE task is not
-used.  This field may be NULL to indicate that the default IDLE
-is to be used.
-
-@item do_zero_of_workspace
-indicates whether RTEMS should
-zero the Workspace as part of its initialization.  If set to
-TRUE, the Workspace is zeroed.  Otherwise, it is not.
-
-@item idle_task_stack_size
-is the size of the RTEMS idle task stack in bytes.  
-If this number is less than MINIMUM_STACK_SIZE, then the 
-idle task's stack will be MINIMUM_STACK_SIZE in byte.
-
-@item interrupt_stack_size
-is the size of the RTEMS
-allocated interrupt stack in bytes.  This value must be at least
-as large as MINIMUM_STACK_SIZE.
-
-@item extra_mpci_receive_server_stack
-is the extra stack space allocated for the RTEMS MPCI receive server task
-in bytes.  The MPCI receive server may invoke nearly all directives and 
-may require extra stack space on some targets.
-
-@item stack_allocate_hook
-is the address of the optional user provided routine which allocates 
-memory for task stacks.  If this hook is not NULL, then a stack_free_hook
-must be provided as well.
-
-@item stack_free_hook
-is the address of the optional user provided routine which frees 
-memory for task stacks.  If this hook is not NULL, then a stack_allocate_hook
-must be provided as well.
-
-@item interrupt_segment
-is the value of the selector which should be placed in a segment 
-register to access the Interrupt Descriptor Table.
-
-@item interrupt_vector_table
-is the base address of the Interrupt Descriptor Table relative to the 
-interrupt_segment.
-
-@end table
-
-The contents of the i386 Interrupt Descriptor Table
-are discussed in  Intel's i386 User's Manual.  Structure
-definitions for the i386 IDT is provided by including the file
-rtems.h.
-
diff --git a/doc/supplements/i386/fatalerr.t b/doc/supplements/i386/fatalerr.t
deleted file mode 100644
index add48ab643..0000000000
--- a/doc/supplements/i386/fatalerr.t
+++ /dev/null
@@ -1,31 +0,0 @@
-@c
-@c  COPYRIGHT (c) 1988-2002.
-@c  On-Line Applications Research Corporation (OAR).
-@c  All rights reserved.
-@c
-@c  $Id$
-@c
-
-@chapter Default Fatal Error Processing
-
-@section Introduction
-
-Upon detection of a fatal error by either the
-application or RTEMS the fatal error manager is invoked.  The
-fatal error manager will invoke the user-supplied fatal error
-handlers.  If no user-supplied handlers are configured,  the
-RTEMS provided default fatal error handler is invoked.  If the
-user-supplied fatal error handlers return to the executive the
-default fatal error handler is then invoked.  This chapter
-describes the precise operations of the default fatal error
-handler.
-
-@section Default Fatal Error Handler Operations
-
-The default fatal error handler which is invoked by
-the fatal_error_occurred directive when there is no user handler
-configured or the user handler returns control to RTEMS.  The
-default fatal error handler disables processor interrupts,
-places the error code in EAX, and executes a HLT instruction to
-halt the processor.
-
diff --git a/doc/supplements/i386/i386.texi b/doc/supplements/i386/i386.texi
deleted file mode 100644
index 23c92718bc..0000000000
--- a/doc/supplements/i386/i386.texi
+++ /dev/null
@@ -1,114 +0,0 @@
-\input texinfo   @c -*-texinfo-*-
-@c %**start of header
-@setfilename i386.info
-@setcontentsaftertitlepage
-@syncodeindex vr fn
-@synindex ky cp
-@paragraphindent 0
-@c %**end of header
-
-@c
-@c  COPYRIGHT (c) 1988-2002.
-@c  On-Line Applications Research Corporation (OAR).
-@c  All rights reserved.
-@c
-@c  $Id$
-@c
-
-@c
-@c   Master file for the Intel i386 Applications Supplement
-@c
-
-@include version.texi
-@include common/setup.texi
-@include common/rtems.texi
-
-@ifset use-ascii
-@dircategory RTEMS Target Supplements
-@direntry
-* RTEMS Intel i386 Applications Supplement: (i386).
-@end direntry
-@end ifset
-
-@c
-@c  Title Page Stuff
-@c
-
-@c
-@c  I don't really like having a short title page.  --joel
-@c
-@c @shorttitlepage RTEMS Intel i386 Applications Supplement 
-
-@setchapternewpage odd
-@settitle RTEMS Intel i386 Applications Supplement 
-@titlepage
-@finalout
-
-@title RTEMS Intel i386 Applications Supplement 
-@subtitle Edition @value{EDITION}, for RTEMS @value{VERSION}
-@sp 1
-@subtitle @value{UPDATED}
-@author On-Line Applications Research Corporation
-@page
-@include common/cpright.texi
-@end titlepage
-
-@c  This prevents a black box from being printed on "overflow" lines.
-@c  The alternative is to rework a sentence to avoid this problem.
-
-@include preface.texi
-@include cpumodel.texi
-@include callconv.texi
-@include memmodel.texi
-@include intr.texi
-@include fatalerr.texi
-@include bsp.texi
-@include cputable.texi
-@include wksheets.texi
-@include timing.texi
-@include timeFORCE386.texi
-@ifinfo
-@node Top, Preface, (dir), (dir)
-@top i386
-
-This is the online version of the RTEMS Intel i386
-Applications Supplement.
-
-@menu
-* Preface::
-* CPU Model Dependent Features::
-* Calling Conventions::
-* Memory Model::
-* Interrupt Processing::
-* Default Fatal Error Processing::
-* Board Support Packages::
-* Processor Dependent Information Table::
-* Memory Requirements::
-* Timing Specification::
-* CPU386 Timing Data::
-* Command and Variable Index::
-* Concept Index::
-@end menu
-
-@end ifinfo
-@c 
-@c 
-@c Need to copy the emacs stuff and "trailer stuff" (index, toc) into here
-@c
-
-@node Command and Variable Index, Concept Index, CPU386 Timing Data Rate Monotonic Manager, Top
-@unnumbered Command and Variable Index
-
-There are currently no Command and Variable Index entries.
-
-@c @printindex fn
-
-@node Concept Index, , Command and Variable Index, Top
-@unnumbered Concept Index
-
-There are currently no Concept Index entries.
-@c @printindex cp
-
-@contents
-@bye
-
diff --git a/doc/supplements/i386/intr_NOTIMES.t b/doc/supplements/i386/intr_NOTIMES.t
deleted file mode 100644
index 1db03127ec..0000000000
--- a/doc/supplements/i386/intr_NOTIMES.t
+++ /dev/null
@@ -1,168 +0,0 @@
-@c
-@c  COPYRIGHT (c) 1988-2002.
-@c  On-Line Applications Research Corporation (OAR).
-@c  All rights reserved.
-@c
-@c  $Id$
-@c
-
-@chapter Interrupt Processing
-
-@section Introduction
-
-Different types of processors respond to the
-occurrence of an interrupt in their own unique fashion. In
-addition, each processor type provides a control mechanism to
-allow the proper handling of an interrupt.  The processor
-dependent response to the interrupt modifies the execution state
-and results in the modification of the execution stream. This
-modification usually requires that an interrupt handler utilize
-the provided control mechanisms to return to the normal
-processing stream.  Although RTEMS hides many of the processor
-dependent details of interrupt processing, it is important to
-understand how the RTEMS interrupt manager is mapped onto the
-processor's unique architecture. Discussed in this chapter are
-the the processor's response and control mechanisms as they
-pertain to RTEMS.
-
-@section Vectoring of Interrupt Handler
-
-Although the i386 supports multiple privilege levels,
-RTEMS and all user software executes at privilege level 0.  This
-decision was made by the RTEMS designers to enhance
-compatibility with processors which do not provide sophisticated
-protection facilities like those of the i386.  This decision
-greatly simplifies the discussion of i386 processing, as one
-need only consider interrupts without privilege transitions.
-
-Upon receipt of an interrupt  the i386 automatically
-performs the following actions:
-
-@itemize @bullet
-@item pushes the EFLAGS register
-
-@item pushes the far address of the interrupted instruction
-
-@item vectors to the interrupt service routine (ISR).
-@end itemize
-
-A nested interrupt is processed similarly by the
-i386.
-
-@section Interrupt Stack Frame
-
-The structure of the Interrupt Stack Frame for the
-i386 which is placed on the interrupt stack by the processor in
-response to an interrupt is as follows:
-
-@ifset use-ascii
-@example
-@group
-               +----------------------+
-               | Old EFLAGS Register  | ESP+8
-               +----------+-----------+
-               |   UNUSED |  Old CS   | ESP+4
-               +----------+-----------+
-               |       Old EIP        | ESP
-               +----------------------+
-@end group
-@end example
-@end ifset
-
-@ifset use-tex
-@sp 1
-@tex
-\centerline{\vbox{\offinterlineskip\halign{
-\strut\vrule#&
-\hbox to 1.00in{\enskip\hfil#\hfil}&
-\vrule#&
-\hbox to 1.00in{\enskip\hfil#\hfil}&
-\vrule#&
-\hbox to 0.75in{\enskip\hfil#\hfil}
-\cr
-\multispan{4}\hrulefill\cr
-& \multispan{3} Old EFLAGS Register\quad&&ESP+8\cr
-\multispan{4}\hrulefill\cr
-&UNUSED &&Old CS &&ESP+4\cr
-\multispan{4}\hrulefill\cr
-& \multispan{3} Old EIP && ESP\cr
-\multispan{4}\hrulefill\cr
-}}\hfil}
-@end tex
-@end ifset
- 
-@ifset use-html
-@html
-<CENTER>
-  <TABLE COLS=3 WIDTH="40%" BORDER=2>
-<TR><TD ALIGN=center COLSPAN=2><STRONG>Old EFLAGS Register</STRONG></TD>
-    <TD ALIGN=center>0x0</TD></TR>
-<TR><TD ALIGN=center><STRONG>UNUSED</STRONG></TD>
-    <TD ALIGN=center><STRONG>Old CS</STRONG></TD>
-    <TD ALIGN=center>0x2</TD></TR>
-<TR><TD ALIGN=center COLSPAN=2><STRONG>Old EIP</STRONG></TD>
-    <TD ALIGN=center>0x4</TD></TR>
-  </TABLE>
-</CENTER>
-@end html
-@end ifset
-
-@section Interrupt Levels
-
-Although RTEMS supports 256 interrupt levels, the
-i386 only supports two -- enabled and disabled.  Interrupts are
-enabled when the interrupt-enable flag (IF) in the extended
-flags (EFLAGS) is set.  Conversely, interrupt processing is
-inhibited when the IF is cleared.  During a non-maskable
-interrupt, all other interrupts, including other non-maskable
-ones, are inhibited.
-
-RTEMS interrupt levels 0 and 1 such that level zero
-(0) indicates that interrupts are fully enabled and level one
-that interrupts are disabled.  All other RTEMS interrupt levels
-are undefined and their behavior is unpredictable.
-
-@section Disabling of Interrupts by RTEMS
-
-During the execution of directive calls, critical
-sections of code may be executed.  When these sections are
-encountered, RTEMS disables interrupts before the execution of
-this section and restores them to the previous level upon
-completion of the section.  RTEMS has been optimized to insure
-that interrupts are disabled for less than RTEMS_MAXIMUM_DISABLE_PERIOD
-microseconds on a RTEMS_MAXIMUM_DISABLE_PERIOD_MHZ Mhz i386 with zero
-wait states.  These numbers will vary based the number of wait states
-and processor speed present on the target board.   [NOTE:  The maximum
-period with interrupts disabled within RTEMS was last calculated for
-Release RTEMS_RELEASE_FOR_MAXIMUM_DISABLE_PERIOD.]
-
-Non-maskable interrupts (NMI) cannot be disabled, and
-ISRs which execute at this level MUST NEVER issue RTEMS system
-calls.  If a directive is invoked, unpredictable results may
-occur due to the inability of RTEMS to protect its critical
-sections.  However, ISRs that make no system calls may safely
-execute as non-maskable interrupts.
-
-@section Interrupt Stack
-
-The i386 family does not support a dedicated hardware
-interrupt stack.  On this processor, RTEMS allocates and manages
-a dedicated interrupt stack.  As part of vectoring a non-nested
-interrupt service routine, RTEMS switches from the stack of the
-interrupted task to a dedicated interrupt stack.  When a
-non-nested interrupt returns, RTEMS switches back to the stack
-of the interrupted stack.  The current stack pointer is not
-altered by RTEMS on nested interrupt.
-
-Without a dedicated interrupt stack, every task in
-the system MUST have enough stack space to accommodate the worst
-case stack usage of that particular task and the interrupt
-service routines COMBINED.  By supporting a dedicated interrupt
-stack, RTEMS significantly lowers the stack requirements for
-each task.
-
-RTEMS allocates the dedicated interrupt stack from
-the Workspace Area.  The amount of memory allocated for the
-interrupt stack is determined by the interrupt_stack_size field
-in the CPU Configuration Table.
-
diff --git a/doc/supplements/i386/memmodel.t b/doc/supplements/i386/memmodel.t
deleted file mode 100644
index 4ed5c53b7c..0000000000
--- a/doc/supplements/i386/memmodel.t
+++ /dev/null
@@ -1,72 +0,0 @@
-@c
-@c  COPYRIGHT (c) 1988-2002.
-@c  On-Line Applications Research Corporation (OAR).
-@c  All rights reserved.
-@c
-@c  $Id$
-@c
-
-@chapter Memory Model
-
-@section Introduction
-
-A processor may support any combination of memory
-models ranging from pure physical addressing to complex demand
-paged virtual memory systems.  RTEMS supports a flat memory
-model which ranges contiguously over the processor's allowable
-address space.  RTEMS does not support segmentation or virtual
-memory of any kind.  The appropriate memory model for RTEMS
-provided by the targeted processor and related characteristics
-of that model are described in this chapter.
-
-@section Flat Memory Model
-
-RTEMS supports the i386 protected mode, flat memory
-model with paging disabled.  In this mode, the i386
-automatically converts every address from a logical to a
-physical address each time it is used.  The i386 uses
-information provided in the segment registers and the Global
-Descriptor Table to convert these addresses.  RTEMS assumes the
-existence of the following segments:
-
-@itemize @bullet
-@item a single code segment at protection level (0) which
-contains all application and executive code.
-
-@item a single data segment at protection level zero (0) which
-contains all application and executive data.
-@end itemize
-
-The i386 segment registers and associated selectors
-must be initialized when the initialize_executive directive is
-invoked.  RTEMS treats the segment registers as system registers
-and does not modify or context switch them.
-
-This i386 memory model supports a flat 32-bit address
-space with addresses ranging from 0x00000000 to 0xFFFFFFFF (4
-gigabytes).  Each address is represented by a 32-bit value and
-is byte addressable.  The address may be used to reference a
-single byte, half-word (2-bytes), or word (4 bytes).
-
-RTEMS does not require that logical addresses map
-directly to physical addresses, although it is desirable in many
-applications to do so.  If logical and physical addresses are
-not the same, then an additional selector will be required so
-RTEMS can access the Interrupt Descriptor Table to install
-interrupt service routines.  The selector number of this segment
-is provided to RTEMS in the CPU Dependent Information Table.
-
-By not requiring that logical addresses map directly
-to physical addresses, the memory space of an RTEMS application
-can be separated from that of a ROM monitor.  For example, on
-the Force Computers CPU386, the ROM monitor loads application
-programs into a logical address space where logical address
-0x00000000 corresponds to physical address 0x0002000.  On this
-board, RTEMS and the application use virtual addresses which do
-not map to physical addresses.
-
-RTEMS assumes that the DS and ES registers contain
-the selector for the single data segment when a directive is
-invoked.   This assumption is especially important when
-developing interrupt service routines.
-
diff --git a/doc/supplements/i386/preface.texi b/doc/supplements/i386/preface.texi
deleted file mode 100644
index b33c0671c6..0000000000
--- a/doc/supplements/i386/preface.texi
+++ /dev/null
@@ -1,41 +0,0 @@
-@c
-@c  COPYRIGHT (c) 1988-2002.
-@c  On-Line Applications Research Corporation (OAR).
-@c  All rights reserved.
-@c
-@c  $Id$
-@c
-
-@ifinfo
-@node Preface, CPU Model Dependent Features, Top, Top
-@end ifinfo
-@unnumbered Preface
-
-The Real Time Executive for Multiprocessor Systems
-(RTEMS) is designed to be portable across multiple processor
-architectures.  However, the nature of real-time systems makes
-it essential that the application designer understand certain
-processor dependent implementation details.  These processor
-dependencies include calling convention, board support package
-issues, interrupt processing, exact RTEMS memory requirements,
-performance data, header files, and the assembly language
-interface to the executive.
-
-For information on the i386 processor, refer to the
-following documents:
-
-@itemize @bullet
-@item @cite{386 Programmer's Reference Manual, Intel, Order No.  230985-002}.
-
-@item @cite{386 Microprocessor Hardware Reference Manual, Intel,
-Order No. 231732-003}.
-
-@item @cite{80386 System Software Writer's Guide, Intel, Order No.  231499-001}.
-
-@item @cite{80387 Programmer's Reference Manual, Intel, Order No.  231917-001}.
-@end itemize
-
-It is highly recommended that the i386 RTEMS
-application developer obtain and become familiar with Intel's
-386 Programmer's Reference Manual.
-
diff --git a/doc/supplements/i386/timeFORCE386.t b/doc/supplements/i386/timeFORCE386.t
deleted file mode 100644
index 56f01ae855..0000000000
--- a/doc/supplements/i386/timeFORCE386.t
+++ /dev/null
@@ -1,101 +0,0 @@
-@c
-@c  COPYRIGHT (c) 1988-2002.
-@c  On-Line Applications Research Corporation (OAR).
-@c  All rights reserved.
-@c
-@c  $Id$
-@c
-
-@include common/timemac.texi
-@tex
-\global\advance \smallskipamount by -4pt
-@end tex
- 
-@chapter CPU386 Timing Data
-
-@section Introduction
-
-The timing data for the i386 version of RTEMS is
-provided along with the target dependent aspects concerning the
-gathering of the timing data.  The hardware platform used to
-gather the times is described to give the reader a better
-understanding of each directive time provided.  Also, provided
-is a description of the  interrupt latency and the context
-switch times as they pertain to the i386 version of RTEMS.
-
-@section Hardware Platform
-
-All times reported except for the maximum period
-interrupts are disabled by RTEMS were measured using a Force
-Computers CPU386 board.  The CPU386 is a 16 Mhz board with zero
-wait state dynamic memory and an i80387 numeric coprocessor.
-One of the count-down timers provided by a Motorola MC68901 was
-used to measure elapsed time with one microsecond resolution.
-All sources of hardware interrupts are disabled, although the
-interrupt level of the i386 allows all interrupts.
-
-The maximum period interrupts are disabled was
-measured by summing the number of CPU cycles required by each
-assembly language instruction executed while interrupts were
-disabled.  Zero wait state memory was assumed.  The total CPU
-cycles executed with interrupts disabled, including the
-instructions to disable and enable interrupts, was divided by 16
-to simulate a i386 executing at 16 Mhz.
-
-@section Interrupt Latency
-
-The maximum period with interrupts disabled within
-RTEMS is less than RTEMS_MAXIMUM_DISABLE_PERIOD microseconds 
-including the instructions
-which disable and re-enable interrupts.  The time required for
-the i386 to generate an interrupt using the int instruction,
-vectoring to an interrupt handler, and for the RTEMS entry
-overhead before invoking the user's interrupt handler are a
-total of 12 microseconds.  These combine to yield a worst case
-interrupt latency of less 
-RTEMS_MAXIMUM_DISABLE_PERIOD + RTEMS_INTR_ENTRY_RETURNS_TO_PREEMPTING_TASK 
-microseconds.  [NOTE:  The
-maximum period with interrupts disabled within RTEMS was last
-calculated for Release RTEMS_RELEASE_FOR_MAXIMUM_DISABLE_PERIOD.]
-
-It should be noted again that the maximum period with
-interrupts disabled within RTEMS is hand-timed.  The interrupt
-vector and entry overhead time was generated on the Force
-Computers CPU386 benchmark platform using the int instruction as
-the interrupt source.
-
-@section Context Switch
-
-The RTEMS processor context switch time is RTEMS_NO_FP_CONTEXTS
-microseconds on the Force Computers CPU386 benchmark platform.
-This time represents the raw context switch time with no user
-extensions configured.  Additional execution time is required
-when a TASK_SWITCH user extension is configured.  The use of the
-TASK_SWITCH extension is application dependent.  Thus, its
-execution time is not considered part of the base context switch
-time.
-
-Since RTEMS was designed specifically for embedded
-missile applications which are floating point intensive, the
-executive is optimized to avoid unnecessarily saving and
-restoring the state of the numeric coprocessor.  The state of
-the numeric coprocessor is only saved when a FLOATING_POINT task
-is dispatched and that task was not the last task to utilize the
-coprocessor.  In a system with only one FLOATING_POINT task, the
-state of the numeric coprocessor will never be saved or
-restored.  When the first FLOATING_POINT task is dispatched,
-RTEMS does not need to save the current state of the numeric
-coprocessor.
-
-The exact amount of time required to save and restore
-floating point context is dependent on the state of the numeric
-coprocessor.  RTEMS places the coprocessor in the initialized
-state when a task is started or restarted.  Once the task has
-utilized the coprocessor, it is in the idle state when floating
-point instructions are not executing and the busy state when
-floating point instructions are executing.  The state of the
-coprocessor is task specific.
-
-The following table summarizes the context switch
-times for the Force Computers CPU386 benchmark platform:
-