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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-01-28 12:10:08 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-02-04 10:06:35 +0100 |
| commit | 022851aba54d32831feaff13deb3d9943e130eee (patch) | |
| tree | c1d6a8404dae393bd147790f6a9cf09c2f327b5a /doc/cpu_supplement/cpu_supplement.texi | |
| parent | bsps: Thread-local storage (TLS) for linkcmds (diff) | |
| download | rtems-022851aba54d32831feaff13deb3d9943e130eee.tar.bz2 | |
Add thread-local storage (TLS) support
Tested and implemented on ARM, m68k, PowerPC and SPARC. Other
architectures need more work.
Diffstat (limited to '')
| -rw-r--r-- | doc/cpu_supplement/cpu_supplement.texi | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/doc/cpu_supplement/cpu_supplement.texi b/doc/cpu_supplement/cpu_supplement.texi index 7195da94b2..1087538f4e 100644 --- a/doc/cpu_supplement/cpu_supplement.texi +++ b/doc/cpu_supplement/cpu_supplement.texi @@ -65,10 +65,15 @@ * ARM Specific Information:: * Atmel AVR Specific Information:: * Blackfin Specific Information:: +* Renesas H8/300 Specific Information:: * Intel/AMD x86 Specific Information:: * Lattice Mico32 Specific Information:: +* Renesas M32C Specific Information:: +* Renesas M32R Specific Information:: * M68xxx and Coldfire Specific Information:: +* Xilinx MicroBlaze Specific Information:: * MIPS Specific Information:: +* Altera Nios II Specific Information:: * PowerPC Specific Information:: * SuperH Specific Information:: * SPARC Specific Information:: @@ -83,10 +88,15 @@ @include arm.texi @include avr.texi @include bfin.texi +@include h8300.texi @include i386.texi @include lm32.texi +@include m32c.texi +@include m32r.texi @include m68k.texi +@include microblaze.texi @include mips.texi +@include nios2.texi @include powerpc.texi @include sh.texi @include sparc.texi |