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authorRalf Corsepius <ralf.corsepius@rtems.org>2011-02-11 08:54:08 +0000
committerRalf Corsepius <ralf.corsepius@rtems.org>2011-02-11 08:54:08 +0000
commitf8958d9c7dbf1c6c24e030bde097b68fee27eee1 (patch)
treeec785fee2dae932043cd90b27605bd347ec17857 /cpukit
parent2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org> (diff)
downloadrtems-f8958d9c7dbf1c6c24e030bde097b68fee27eee1.tar.bz2
2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org>
* cpu.c, rtems/score/mips.h: Use "__asm__" instead of "asm" for improved c99-compliance.
Diffstat (limited to 'cpukit')
-rw-r--r--cpukit/score/cpu/mips/ChangeLog5
-rw-r--r--cpukit/score/cpu/mips/cpu.c2
-rw-r--r--cpukit/score/cpu/mips/rtems/score/mips.h32
3 files changed, 22 insertions, 17 deletions
diff --git a/cpukit/score/cpu/mips/ChangeLog b/cpukit/score/cpu/mips/ChangeLog
index ebce64b098..a2e2a0e4ee 100644
--- a/cpukit/score/cpu/mips/ChangeLog
+++ b/cpukit/score/cpu/mips/ChangeLog
@@ -1,3 +1,8 @@
+2011-02-11 Ralf Corsépius <ralf.corsepius@rtems.org>
+
+ * cpu.c, rtems/score/mips.h:
+ Use "__asm__" instead of "asm" for improved c99-compliance.
+
2011-01-04 Joel Sherrill <joel.sherrill@oarcorp.com>
* cpu_asm.S: _Thread_Executing was not used.
diff --git a/cpukit/score/cpu/mips/cpu.c b/cpukit/score/cpu/mips/cpu.c
index 773f5f1334..e547e4d684 100644
--- a/cpukit/score/cpu/mips/cpu.c
+++ b/cpukit/score/cpu/mips/cpu.c
@@ -315,7 +315,7 @@ void *_CPU_Thread_Idle_body( uintptr_t ignored )
{
#if (__mips == 3) || (__mips == 32)
for( ; ; )
- asm volatile("wait"); /* use wait to enter low power mode */
+ __asm__ volatile("wait"); /* use wait to enter low power mode */
#elif __mips == 1
for( ; ; )
;
diff --git a/cpukit/score/cpu/mips/rtems/score/mips.h b/cpukit/score/cpu/mips/rtems/score/mips.h
index 1cffa3a15f..8c4f3ae0f4 100644
--- a/cpukit/score/cpu/mips/rtems/score/mips.h
+++ b/cpukit/score/cpu/mips/rtems/score/mips.h
@@ -116,13 +116,13 @@ extern "C" {
#define mips_get_sr( _x ) \
do { \
- asm volatile( "mfc0 %0, $12; nop" : "=r" (_x) : ); \
+ __asm__ volatile( "mfc0 %0, $12; nop" : "=r" (_x) : ); \
} while (0)
#define mips_set_sr( _x ) \
do { \
register unsigned int __x = (_x); \
- asm volatile( "mtc0 %0, $12; nop" : : "r" (__x) ); \
+ __asm__ volatile( "mtc0 %0, $12; nop" : : "r" (__x) ); \
} while (0)
@@ -132,14 +132,14 @@ extern "C" {
#define mips_get_cause( _x ) \
do { \
- asm volatile( "mfc0 %0, $13; nop" : "=r" (_x) : ); \
+ __asm__ volatile( "mfc0 %0, $13; nop" : "=r" (_x) : ); \
} while (0)
#define mips_set_cause( _x ) \
do { \
register unsigned int __x = (_x); \
- asm volatile( "mtc0 %0, $13; nop" : : "r" (__x) ); \
+ __asm__ volatile( "mtc0 %0, $13; nop" : : "r" (__x) ); \
} while (0)
@@ -151,14 +151,14 @@ extern "C" {
#define mips_get_dcic( _x ) \
do { \
- asm volatile( "mfc0 %0, $7; nop" : "=r" (_x) : ); \
+ __asm__ volatile( "mfc0 %0, $7; nop" : "=r" (_x) : ); \
} while (0)
#define mips_set_dcic( _x ) \
do { \
register unsigned int __x = (_x); \
- asm volatile( "mtc0 %0, $7; nop" : : "r" (__x) ); \
+ __asm__ volatile( "mtc0 %0, $7; nop" : : "r" (__x) ); \
} while (0)
@@ -171,8 +171,8 @@ extern "C" {
#define mips_get_bpcrm( _x, _y ) \
do { \
- asm volatile( "mfc0 %0, $3; nop" : "=r" (_x) : ); \
- asm volatile( "mfc0 %0, $11; nop" : "=r" (_y) : ); \
+ __asm__ volatile( "mfc0 %0, $3; nop" : "=r" (_x) : ); \
+ __asm__ volatile( "mfc0 %0, $11; nop" : "=r" (_y) : ); \
} while (0)
@@ -180,8 +180,8 @@ extern "C" {
do { \
register unsigned int __x = (_x); \
register unsigned int __y = (_y); \
- asm volatile( "mtc0 %0, $11; nop" : : "r" (__y) ); \
- asm volatile( "mtc0 %0, $3; nop" : : "r" (__x) ); \
+ __asm__ volatile( "mtc0 %0, $11; nop" : : "r" (__y) ); \
+ __asm__ volatile( "mtc0 %0, $3; nop" : : "r" (__x) ); \
} while (0)
@@ -196,8 +196,8 @@ extern "C" {
#define mips_get_bdarm( _x, _y ) \
do { \
- asm volatile( "mfc0 %0, $5; nop" : "=r" (_x) : ); \
- asm volatile( "mfc0 %0, $9; nop" : "=r" (_y) : ); \
+ __asm__ volatile( "mfc0 %0, $5; nop" : "=r" (_x) : ); \
+ __asm__ volatile( "mfc0 %0, $9; nop" : "=r" (_y) : ); \
} while (0)
@@ -205,8 +205,8 @@ extern "C" {
do { \
register unsigned int __x = (_x); \
register unsigned int __y = (_y); \
- asm volatile( "mtc0 %0, $9; nop" : : "r" (__y) ); \
- asm volatile( "mtc0 %0, $5; nop" : : "r" (__x) ); \
+ __asm__ volatile( "mtc0 %0, $9; nop" : : "r" (__y) ); \
+ __asm__ volatile( "mtc0 %0, $5; nop" : : "r" (__x) ); \
} while (0)
@@ -223,14 +223,14 @@ extern "C" {
#define mips_get_fcr31( _x ) \
do { \
- asm volatile( "cfc1 %0, $31; nop" : "=r" (_x) : ); \
+ __asm__ volatile( "cfc1 %0, $31; nop" : "=r" (_x) : ); \
} while(0)
#define mips_set_fcr31( _x ) \
do { \
register unsigned int __x = (_x); \
- asm volatile( "ctc1 %0, $31; nop" : : "r" (__x) ); \
+ __asm__ volatile( "ctc1 %0, $31; nop" : : "r" (__x) ); \
} while(0)
#else