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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2021-03-02 12:31:45 +0100 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2021-03-02 21:46:52 +0100 |
commit | 83b1b25d4cd0d4ef045045a821f10e134a5fa6b8 (patch) | |
tree | 91b2db8796683aeb73c25ae4fc2ac08ea5338e40 /cpukit | |
parent | rtems: Simplify _Signal_Action_handler() (diff) | |
download | rtems-83b1b25d4cd0d4ef045045a821f10e134a5fa6b8.tar.bz2 |
rtems: Simplify rtems_signal_catch()
In uniprocessor configurations, we can simplify rtems_signal_catch().
Add a validation test for the SMP special case.
Diffstat (limited to 'cpukit')
-rw-r--r-- | cpukit/rtems/src/signalcatch.c | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/cpukit/rtems/src/signalcatch.c b/cpukit/rtems/src/signalcatch.c index e80d2c082a..9907908a40 100644 --- a/cpukit/rtems/src/signalcatch.c +++ b/cpukit/rtems/src/signalcatch.c @@ -58,17 +58,35 @@ rtems_status_code rtems_signal_catch( asr->handler = asr_handler; asr->mode_set = mode_set; +#if defined(RTEMS_SMP) if ( asr_handler == NULL ) { Chain_Node *node; - asr->signals_pending = 0; + /* + * In SMP configurations, signals may be sent on other processors + * (interrupts or threads) in parallel. This will cause an inter-processor + * interrupt which may be blocked by the above interrupt disable. + */ + node = &api->Signal_action.Node; + _Assert( asr->signals_pending == 0 || !_Chain_Is_node_off_chain( node ) ); + _Assert( asr->signals_pending != 0 || _Chain_Is_node_off_chain( node ) ); if ( !_Chain_Is_node_off_chain( node ) ) { + asr->signals_pending = 0; _Chain_Extract_unprotected( node ); _Chain_Set_off_chain( node ); } } +#else + /* + * In uniprocessor configurations, as soon as interrupts are disabled above + * nobody can send signals to the executing thread. So, pending signals at + * this point cannot appear. + */ + _Assert( asr->signals_pending == 0 ); + _Assert( _Chain_Is_node_off_chain( &api->Signal_action.Node ) ); +#endif _Thread_State_release( executing, &lock_context ); return RTEMS_SUCCESSFUL; |