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authorJoel Sherrill <joel.sherrill@OARcorp.com>2000-11-15 21:33:35 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2000-11-15 21:33:35 +0000
commit477e2d195fbaaab64fb5e6b8443982ad423d05b6 (patch)
tree36548531ac8e11ecfffe51afbca0a26905f8d768 /cpukit
parent2000-11-14 Jiri Gaisler <jgais@ws.estec.esa.nl> (diff)
downloadrtems-477e2d195fbaaab64fb5e6b8443982ad423d05b6.tar.bz2
2000-11-14 Jiri Gaisler <jgais@ws.estec.esa.nl>
* cpu.c, rtems/cpu/sparc.h: Make floating point optional based on gcc arguments. Do not initialize FP context if there is no FPU. Flush instruction cache after installing RTEMS trap handler.
Diffstat (limited to 'cpukit')
-rw-r--r--cpukit/score/cpu/sparc/ChangeLog6
-rw-r--r--cpukit/score/cpu/sparc/cpu.c8
-rw-r--r--cpukit/score/cpu/sparc/rtems/score/sparc.h7
3 files changed, 20 insertions, 1 deletions
diff --git a/cpukit/score/cpu/sparc/ChangeLog b/cpukit/score/cpu/sparc/ChangeLog
index d3ceec3c9f..0c2efb42b0 100644
--- a/cpukit/score/cpu/sparc/ChangeLog
+++ b/cpukit/score/cpu/sparc/ChangeLog
@@ -1,3 +1,9 @@
+2000-11-14 Jiri Gaisler <jgais@ws.estec.esa.nl>
+
+ * cpu.c, rtems/cpu/sparc.h: Make floating point optional based
+ on gcc arguments. Do not initialize FP context if there is
+ no FPU. Flush instruction cache after installing RTEMS trap handler.
+
2000-11-09 Ralf Corsepius <corsepiu@faw.uni-ulm.de>
* Makefile.am: Use ... instead of RTEMS_TOPdir in ACLOCAL_AMFLAGS.
diff --git a/cpukit/score/cpu/sparc/cpu.c b/cpukit/score/cpu/sparc/cpu.c
index 2ba0815058..9471d15591 100644
--- a/cpukit/score/cpu/sparc/cpu.c
+++ b/cpukit/score/cpu/sparc/cpu.c
@@ -86,6 +86,8 @@ void _CPU_Initialize(
#endif
+#if (SPARC_HAS_FPU == 1)
+
/*
* This seems to be the most appropriate way to obtain an initial
* FP context on the SPARC. The NULL fp context is copied it to
@@ -94,6 +96,7 @@ void _CPU_Initialize(
pointer = &_CPU_Null_fp_context;
_CPU_Context_save_fp( &pointer );
+#endif
/*
* Grab our own copy of the user's CPU table.
@@ -222,6 +225,11 @@ void _CPU_ISR_install_raw_handler(
slot->sethi_of_handler_to_l4 |=
(u32_handler & HIGH_BITS_MASK) >> HIGH_BITS_SHIFT;
slot->jmp_to_low_of_handler_plus_l4 |= (u32_handler & LOW_BITS_MASK);
+
+ /* need to flush icache after this !!! */
+
+ rtems_cache_invalidate_entire_instruction();
+
}
/*PAGE
diff --git a/cpukit/score/cpu/sparc/rtems/score/sparc.h b/cpukit/score/cpu/sparc/rtems/score/sparc.h
index 1d09116295..e6d7690702 100644
--- a/cpukit/score/cpu/sparc/rtems/score/sparc.h
+++ b/cpukit/score/cpu/sparc/rtems/score/sparc.h
@@ -65,7 +65,12 @@ extern "C" {
* cpp predefine but gcc does not currently give us that information.
*/
-#define SPARC_HAS_FPU 1
+
+#if defined(_SOFT_FLOAT)
+#define SPARC_HAS_FPU 0
+#else
+#define SPARC_HAS_FPU 1
+#endif
#if SPARC_HAS_FPU
#define CPU_MODEL_NAME "w/FPU"