diff options
author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2009-03-12 14:19:45 +0000 |
---|---|---|
committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2009-03-12 14:19:45 +0000 |
commit | ed7383d2c7764ca8351a3078941cd3ae893fd501 (patch) | |
tree | 1384b4a7c59fdc009bf615a212553f64a0cd5e5c /cpukit | |
parent | 2009-03-12 Joel Sherrill <joel.sherrill@OARcorp.com> (diff) | |
download | rtems-ed7383d2c7764ca8351a3078941cd3ae893fd501.tar.bz2 |
2009-03-12 Joel Sherrill <joel.sherrill@OARcorp.com>
PR 1385/cpukit
* cpu_asm.S: When the type rtems_boolean was switched to the C99 bool,
the size changed from 4 bytes to 1 byte. The interrupt dispatching
code accesses two boolean variables for scheduling purposes and the
assembly implementations of this code did not get updated.
Diffstat (limited to 'cpukit')
-rw-r--r-- | cpukit/score/cpu/bfin/ChangeLog | 8 | ||||
-rw-r--r-- | cpukit/score/cpu/bfin/cpu_asm.S | 8 | ||||
-rw-r--r-- | cpukit/score/cpu/h8300/ChangeLog | 8 | ||||
-rw-r--r-- | cpukit/score/cpu/h8300/cpu_asm.S | 4 | ||||
-rw-r--r-- | cpukit/score/cpu/m68k/ChangeLog | 8 | ||||
-rw-r--r-- | cpukit/score/cpu/m68k/cpu_asm.S | 6 | ||||
-rw-r--r-- | cpukit/score/cpu/mips/ChangeLog | 8 | ||||
-rw-r--r-- | cpukit/score/cpu/mips/cpu_asm.S | 8 | ||||
-rw-r--r-- | cpukit/score/cpu/sparc/ChangeLog | 8 | ||||
-rw-r--r-- | cpukit/score/cpu/sparc/cpu_asm.S | 8 |
10 files changed, 57 insertions, 17 deletions
diff --git a/cpukit/score/cpu/bfin/ChangeLog b/cpukit/score/cpu/bfin/ChangeLog index 617390bc97..2c4cb3b2c3 100644 --- a/cpukit/score/cpu/bfin/ChangeLog +++ b/cpukit/score/cpu/bfin/ChangeLog @@ -1,3 +1,11 @@ +2009-03-12 Joel Sherrill <joel.sherrill@OARcorp.com> + + PR 1385/cpukit + * cpu_asm.S: When the type rtems_boolean was switched to the C99 bool, + the size changed from 4 bytes to 1 byte. The interrupt dispatching + code accesses two boolean variables for scheduling purposes and the + assembly implementations of this code did not get updated. + 2008-09-18 Ralf Corsépius <ralf.corsepius@rtems.org> * rtems/score/types.h: Do not define boolean, single_precision, diff --git a/cpukit/score/cpu/bfin/cpu_asm.S b/cpukit/score/cpu/bfin/cpu_asm.S index 9a00262c89..a9fa913f48 100644 --- a/cpukit/score/cpu/bfin/cpu_asm.S +++ b/cpukit/score/cpu/bfin/cpu_asm.S @@ -474,7 +474,7 @@ noHandler: sp = [sp]; noStackRestore: - /* check this stuff to insure context_switch_necessary and + /* check this stuff to ensure context_switch_necessary and isr_signals_to_thread_executing are being handled appropriately. */ p0.h = __Thread_Dispatch_disable_level; p0.l = __Thread_Dispatch_disable_level; @@ -487,17 +487,17 @@ noStackRestore: /* do thread dispatch if necessary */ p0.h = __Context_Switch_necessary; p0.l = __Context_Switch_necessary; - r0 = [p0]; + r0 = B[p0] (Z); cc = r0 == 0; p0.h = __ISR_Signals_to_thread_executing; p0.l = __ISR_Signals_to_thread_executing; if !cc jump doDispatch - r0 = [p0]; + r0 = B[p0] (Z); cc = r0 == 0; if cc jump noDispatch doDispatch: r0 = 0; - [p0] = r0; + B[p0] = r0; raise 15; noDispatch: r0 = [sp++]; diff --git a/cpukit/score/cpu/h8300/ChangeLog b/cpukit/score/cpu/h8300/ChangeLog index d8e4da1e34..c23ab10dff 100644 --- a/cpukit/score/cpu/h8300/ChangeLog +++ b/cpukit/score/cpu/h8300/ChangeLog @@ -1,3 +1,11 @@ +2009-03-12 Joel Sherrill <joel.sherrill@OARcorp.com> + + PR 1385/cpukit + * cpu_asm.S: When the type rtems_boolean was switched to the C99 bool, + the size changed from 4 bytes to 1 byte. The interrupt dispatching + code accesses two boolean variables for scheduling purposes and the + assembly implementations of this code did not get updated. + 2008-09-18 Ralf Corsépius <ralf.corsepius@rtems.org> * rtems/score/types.h: Do not define boolean, single_precision, diff --git a/cpukit/score/cpu/h8300/cpu_asm.S b/cpukit/score/cpu/h8300/cpu_asm.S index e006e015f4..8100baa43f 100644 --- a/cpukit/score/cpu/h8300/cpu_asm.S +++ b/cpukit/score/cpu/h8300/cpu_asm.S @@ -145,10 +145,10 @@ nested: mov.l er1,@__Thread_Dispatch_disable_level bne exit - mov.l @__Context_Switch_necessary,er1 + mov.b @__Context_Switch_necessary,er1 bne bframe ; If yes then dispatch next task - mov.l @__ISR_Signals_to_thread_executing,er1 + mov.b @__ISR_Signals_to_thread_executing,er1 beq exit ; If no signals waiting /* Context switch here through ISR_Dispatch */ diff --git a/cpukit/score/cpu/m68k/ChangeLog b/cpukit/score/cpu/m68k/ChangeLog index 26d33f411f..c3c4db01ae 100644 --- a/cpukit/score/cpu/m68k/ChangeLog +++ b/cpukit/score/cpu/m68k/ChangeLog @@ -1,3 +1,11 @@ +2009-03-12 Joel Sherrill <joel.sherrill@OARcorp.com> + + PR 1385/cpukit + * cpu_asm.S: When the type rtems_boolean was switched to the C99 bool, + the size changed from 4 bytes to 1 byte. The interrupt dispatching + code accesses two boolean variables for scheduling purposes and the + assembly implementations of this code did not get updated. + 2008-09-18 Ralf Corsépius <ralf.corsepius@rtems.org> * rtems/score/types.h: Do not define boolean, single_precision, diff --git a/cpukit/score/cpu/m68k/cpu_asm.S b/cpukit/score/cpu/m68k/cpu_asm.S index 006922c227..216686bbfd 100644 --- a/cpukit/score/cpu/m68k/cpu_asm.S +++ b/cpukit/score/cpu/m68k/cpu_asm.S @@ -337,16 +337,16 @@ SYM (_ISR_Handler): beq.b exit #endif #endif - tstl SYM (_Context_Switch_necessary) + tstb SYM (_Context_Switch_necessary) | Is thread switch necessary? bne.b bframe | Yes, invoke dispatcher - tstl SYM (_ISR_Signals_to_thread_executing) + tstb SYM (_ISR_Signals_to_thread_executing) | signals sent to Run_thread | while in interrupt handler? beq.b exit | No, then exit -bframe: clrl SYM (_ISR_Signals_to_thread_executing) +bframe: clrb SYM (_ISR_Signals_to_thread_executing) | If sent, will be processed #if ( M68K_HAS_SEPARATE_STACKS == 1 ) movec msp,a0 | a0 = master stack pointer diff --git a/cpukit/score/cpu/mips/ChangeLog b/cpukit/score/cpu/mips/ChangeLog index dfabb509e6..821930b1c6 100644 --- a/cpukit/score/cpu/mips/ChangeLog +++ b/cpukit/score/cpu/mips/ChangeLog @@ -1,3 +1,11 @@ +2009-03-12 Joel Sherrill <joel.sherrill@OARcorp.com> + + PR 1385/cpukit + * cpu_asm.S: When the type rtems_boolean was switched to the C99 bool, + the size changed from 4 bytes to 1 byte. The interrupt dispatching + code accesses two boolean variables for scheduling purposes and the + assembly implementations of this code did not get updated. + 2008-09-18 Ralf Corsépius <ralf.corsepius@rtems.org> * rtems/score/types.h: Do not define boolean, single_precision, diff --git a/cpukit/score/cpu/mips/cpu_asm.S b/cpukit/score/cpu/mips/cpu_asm.S index e3bed37abd..f850eadaad 100644 --- a/cpukit/score/cpu/mips/cpu_asm.S +++ b/cpukit/score/cpu/mips/cpu_asm.S @@ -584,8 +584,8 @@ ENDFRAME(_CPU_Context_restore) ASM_EXTERN(_ISR_Nest_level,4) ASM_EXTERN(_Thread_Dispatch_disable_level,4) -ASM_EXTERN(_Context_Switch_necessary,4) -ASM_EXTERN(_ISR_Signals_to_thread_executing,4) +ASM_EXTERN(_Context_Switch_necessary,1) +ASM_EXTERN(_ISR_Signals_to_thread_executing,1) ASM_EXTERN(_Thread_Executing,4) .extern _Thread_Dispatch @@ -964,8 +964,8 @@ _ISR_Handler_1: * if ( !_Context_Switch_necessary && !_ISR_Signals_to_thread_executing ) * goto the label "exit interrupt (simple case)" */ - lw t0,_Context_Switch_necessary - lw t1,_ISR_Signals_to_thread_executing + lbu t0,_Context_Switch_necessary + lbu t1,_ISR_Signals_to_thread_executing NOP or t0,t0,t1 beq t0,zero,_ISR_Handler_exit diff --git a/cpukit/score/cpu/sparc/ChangeLog b/cpukit/score/cpu/sparc/ChangeLog index a1abb45c44..8e736b6f80 100644 --- a/cpukit/score/cpu/sparc/ChangeLog +++ b/cpukit/score/cpu/sparc/ChangeLog @@ -1,3 +1,11 @@ +2009-03-12 Joel Sherrill <joel.sherrill@OARcorp.com> + + PR 1385/cpukit + * cpu_asm.S: When the type rtems_boolean was switched to the C99 bool, + the size changed from 4 bytes to 1 byte. The interrupt dispatching + code accesses two boolean variables for scheduling purposes and the + assembly implementations of this code did not get updated. + 2008-09-18 Ralf Corsépius <ralf.corsepius@rtems.org> * rtems/score/types.h: Do not define boolean, single_precision, diff --git a/cpukit/score/cpu/sparc/cpu_asm.S b/cpukit/score/cpu/sparc/cpu_asm.S index 56a1fc3b6a..119d3b0228 100644 --- a/cpukit/score/cpu/sparc/cpu_asm.S +++ b/cpukit/score/cpu/sparc/cpu_asm.S @@ -665,7 +665,7 @@ dont_fix_pil2: * return to the interrupt dispatcher. */ - ld [%l4 + %lo(SYM(_Context_Switch_necessary))], %l5 + ldub [%l4 + %lo(SYM(_Context_Switch_necessary))], %l5 orcc %l5, %g0, %g0 ! Is thread switch necessary? bnz SYM(_ISR_Dispatch) ! yes, then invoke the dispatcher @@ -677,7 +677,7 @@ dont_fix_pil2: * executing task. If so, we need to invoke the interrupt dispatcher. */ - ld [%l6 + %lo(SYM(_ISR_Signals_to_thread_executing))], %l7 + ldub [%l6 + %lo(SYM(_ISR_Signals_to_thread_executing))], %l7 orcc %l7, %g0, %g0 ! Were signals sent to the currently ! executing thread? @@ -734,11 +734,11 @@ isr_dispatch: */ sethi %hi(SYM(_Context_Switch_necessary)), %l4 - ld [%l4 + %lo(SYM(_Context_Switch_necessary))], %l5 + ldub [%l4 + %lo(SYM(_Context_Switch_necessary))], %l5 ! NOTE: Use some of delay slot to start loading this sethi %hi(SYM(_ISR_Signals_to_thread_executing)), %l6 - ld [%l6 + %lo(SYM(_ISR_Signals_to_thread_executing))], %l7 + ldub [%l6 + %lo(SYM(_ISR_Signals_to_thread_executing))], %l7 orcc %l5, %g0, %g0 ! Is thread switch necessary? bnz dispatchAgain ! yes, then invoke the dispatcher AGAIN |