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authorSebastian Huber <sebastian.huber@embedded-brains.de>2017-03-09 14:32:04 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2017-08-10 08:21:04 +0200
commit5cc276e7c1a7fb5808749da6f504a18db34c941f (patch)
treeeba4adb07bd043fbf71131e9f8e46b2ada794f55 /cpukit
parent7e91901303219f10cf865906931c07c31d2e37f4 (diff)
downloadrtems-5cc276e7c1a7fb5808749da6f504a18db34c941f.tar.bz2
arm: Fix CPU context validation for Cortex-R4
Do not touch the FPSCR[QC] bit since this is DNM/RAZ on Cortex-R4. Close #3092.
Diffstat (limited to 'cpukit')
-rw-r--r--cpukit/score/cpu/arm/arm-context-validate.S9
-rw-r--r--cpukit/score/cpu/arm/arm-context-volatile-clobber.S5
2 files changed, 4 insertions, 10 deletions
diff --git a/cpukit/score/cpu/arm/arm-context-validate.S b/cpukit/score/cpu/arm/arm-context-validate.S
index fdfb6c156b..1cf53baea1 100644
--- a/cpukit/score/cpu/arm/arm-context-validate.S
+++ b/cpukit/score/cpu/arm/arm-context-validate.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2014 embedded brains GmbH. All rights reserved.
+ * Copyright (c) 2013, 2017 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
@@ -99,12 +99,7 @@ FUNCTION_THUMB_ENTRY(_CPU_Context_validate)
#ifdef ARM_MULTILIB_VFP
/* R3 contains the FPSCR */
vmrs r3, FPSCR
- movs r4, #0x001f
-#ifdef ARM_MULTILIB_ARCH_V7M
- movt r4, #0xf000
-#else
- movt r4, #0xf800
-#endif
+ ldr r4, =0xf000001f
bic r3, r3, r4
and r4, r4, r0
orr r3, r3, r4
diff --git a/cpukit/score/cpu/arm/arm-context-volatile-clobber.S b/cpukit/score/cpu/arm/arm-context-volatile-clobber.S
index 7970b8e690..23facdb88f 100644
--- a/cpukit/score/cpu/arm/arm-context-volatile-clobber.S
+++ b/cpukit/score/cpu/arm/arm-context-volatile-clobber.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2014 embedded brains GmbH. All rights reserved.
+ * Copyright (c) 2013, 2017 embedded brains GmbH. All rights reserved.
*
* embedded brains GmbH
* Dornierstr. 4
@@ -29,8 +29,7 @@ FUNCTION_THUMB_ENTRY(_CPU_Context_volatile_clobber)
#ifdef ARM_MULTILIB_VFP
vmrs r1, FPSCR
- movs r2, #0x001f
- movt r2, #0xf800
+ ldr r2, =0xf000001f
bic r1, r1, r2
and r2, r2, r0
orr r1, r1, r2