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authorSebastian Huber <sebastian.huber@embedded-brains.de>2013-06-14 14:00:38 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2013-07-17 13:09:49 +0200
commit39e51758c86754cef5ba4521c0c36578521f73d0 (patch)
treea87255c5c0592b876106da50b939dedd471b7d5a /cpukit/score
parentsmp: Delete RTEMS_BSP_SMP_CONTEXT_SWITCH_NECESSARY (diff)
downloadrtems-39e51758c86754cef5ba4521c0c36578521f73d0.tar.bz2
smp: Add and use _CPU_SMP_Get_current_processor()
Add and use _SMP_Get_current_processor() and rtems_smp_get_current_processor(). Delete bsp_smp_interrupt_cpu(). Change type of current processor index from int to uint32_t to match _SMP_Processor_count type.
Diffstat (limited to 'cpukit/score')
-rw-r--r--cpukit/score/cpu/arm/rtems/score/cpu.h14
-rw-r--r--cpukit/score/cpu/i386/rtems/score/cpu.h2
-rw-r--r--cpukit/score/cpu/no_cpu/rtems/score/cpu.h13
-rw-r--r--cpukit/score/cpu/powerpc/rtems/score/cpu.h15
-rw-r--r--cpukit/score/cpu/sparc/rtems/score/cpu.h2
-rw-r--r--cpukit/score/include/rtems/bspsmp.h25
-rw-r--r--cpukit/score/include/rtems/score/percpu.h23
-rw-r--r--cpukit/score/include/rtems/score/smp.h12
-rw-r--r--cpukit/score/include/rtems/score/threaddispatch.h4
-rw-r--r--cpukit/score/src/smp.c30
-rw-r--r--cpukit/score/src/threaddispatchdisablelevel.c6
11 files changed, 86 insertions, 60 deletions
diff --git a/cpukit/score/cpu/arm/rtems/score/cpu.h b/cpukit/score/cpu/arm/rtems/score/cpu.h
index 7020261619..ed1b605d09 100644
--- a/cpukit/score/cpu/arm/rtems/score/cpu.h
+++ b/cpukit/score/cpu/arm/rtems/score/cpu.h
@@ -443,6 +443,20 @@ void _CPU_Context_validate( uintptr_t pattern );
#define _CPU_Context_switch_to_first_task_smp( _context ) \
_CPU_Context_restore( _context )
+ RTEMS_COMPILER_PURE_ATTRIBUTE static inline uint32_t
+ _CPU_SMP_Get_current_processor( void )
+ {
+ uint32_t mpidr;
+
+ /* Use ARMv7 Multiprocessor Affinity Register (MPIDR) */
+ __asm__ volatile (
+ "mrc p15, 0, %[mpidr], c0, c0, 5\n"
+ : [mpidr] "=&r" (mpidr)
+ );
+
+ return mpidr & 0xffU;
+ }
+
static inline void _ARM_Data_memory_barrier( void )
{
__asm__ volatile ( "dmb" : : : "memory" );
diff --git a/cpukit/score/cpu/i386/rtems/score/cpu.h b/cpukit/score/cpu/i386/rtems/score/cpu.h
index 3f7a331c3f..b00ae3bfd8 100644
--- a/cpukit/score/cpu/i386/rtems/score/cpu.h
+++ b/cpukit/score/cpu/i386/rtems/score/cpu.h
@@ -455,6 +455,8 @@ uint32_t _CPU_ISR_Get_level( void );
#define _CPU_Context_switch_to_first_task_smp( _the_context ) \
_CPU_Context_restore( (_the_context) );
+ RTEMS_COMPILER_PURE_ATTRIBUTE uint32_t _CPU_SMP_Get_current_processor( void );
+
static inline void _CPU_Processor_event_broadcast( void )
{
__asm__ volatile ( "" : : : "memory" );
diff --git a/cpukit/score/cpu/no_cpu/rtems/score/cpu.h b/cpukit/score/cpu/no_cpu/rtems/score/cpu.h
index e2c6d94c10..d368e51c5f 100644
--- a/cpukit/score/cpu/no_cpu/rtems/score/cpu.h
+++ b/cpukit/score/cpu/no_cpu/rtems/score/cpu.h
@@ -1404,6 +1404,19 @@ static inline uint32_t CPU_swap_u32(
#ifdef RTEMS_SMP
/**
+ * @brief Returns the index of the current processor.
+ *
+ * An architecture specific method must be used to obtain the index of the
+ * current processor in the system. The set of processor indices is the
+ * range of integers starting with zero up to the processor count minus one.
+ */
+ RTEMS_COMPILER_PURE_ATTRIBUTE static inline uint32_t
+ _CPU_SMP_Get_current_processor( void )
+ {
+ return 123;
+ }
+
+ /**
* @brief Broadcasts a processor event.
*
* Some architectures provide a low-level synchronization primitive for
diff --git a/cpukit/score/cpu/powerpc/rtems/score/cpu.h b/cpukit/score/cpu/powerpc/rtems/score/cpu.h
index e3c40981b5..8362c64b3f 100644
--- a/cpukit/score/cpu/powerpc/rtems/score/cpu.h
+++ b/cpukit/score/cpu/powerpc/rtems/score/cpu.h
@@ -1000,6 +1000,21 @@ void _CPU_Context_validate( uintptr_t pattern );
#define _CPU_Context_switch_to_first_task_smp( _context ) \
_CPU_Context_restore( _context )
+ RTEMS_COMPILER_PURE_ATTRIBUTE static inline uint32_t
+ _CPU_SMP_Get_current_processor( void )
+ {
+ uint32_t pir;
+
+ /* Use Book E Processor ID Register (PIR) */
+ __asm__ volatile (
+ "mfspr %[pir], 286"
+ : [pir] "=&r" (pir)
+ );
+
+ return pir;
+ }
+
+
static inline void _CPU_Processor_event_broadcast( void )
{
__asm__ volatile ( "" : : : "memory" );
diff --git a/cpukit/score/cpu/sparc/rtems/score/cpu.h b/cpukit/score/cpu/sparc/rtems/score/cpu.h
index defc01a779..e4eb65e88a 100644
--- a/cpukit/score/cpu/sparc/rtems/score/cpu.h
+++ b/cpukit/score/cpu/sparc/rtems/score/cpu.h
@@ -1186,6 +1186,8 @@ void _CPU_Context_restore(
Context_Control *new_context
);
+ RTEMS_COMPILER_PURE_ATTRIBUTE uint32_t _CPU_SMP_Get_current_processor( void );
+
static inline void _CPU_Processor_event_broadcast( void )
{
__asm__ volatile ( "" : : : "memory" );
diff --git a/cpukit/score/include/rtems/bspsmp.h b/cpukit/score/include/rtems/bspsmp.h
index b712c4fe95..57f5a7a458 100644
--- a/cpukit/score/include/rtems/bspsmp.h
+++ b/cpukit/score/include/rtems/bspsmp.h
@@ -70,16 +70,6 @@ extern "C" {
uint32_t bsp_smp_initialize( uint32_t configured_cpu_count );
/**
- * @brief Obtain current CPU index.
- *
- * This method is invoked by RTEMS when it needs to know the index
- * of the CPU it is executing on.
- *
- * @retval This method returns the current CPU index.
- */
-int bsp_smp_processor_id(void) RTEMS_COMPILER_PURE_ATTRIBUTE;
-
-/**
* @brief Generate an interprocessor broadcast interrupt.
*
* This method is invoked when RTEMS wants to let all of the other
@@ -106,19 +96,6 @@ void bsp_smp_interrupt_cpu(
);
/**
- * @brief Obtain CPU core number.
- *
- * This method is invoked by RTEMS when it needs to know which core
- * number it is executing on. This is used when it needs to perform
- * some action or bookkeeping and needs to distinguish itself from
- * the other cores. For example, it may need to realize it needs to
- * preempt a thread on another node.
- *
- * @retval This method returns the Id of the current CPU core.
- */
-int bsp_smp_processor_id( void );
-
-/**
* @brief Performs high-level initialization of a secondary processor and runs
* the application threads.
*
@@ -156,8 +133,6 @@ void rtems_smp_process_interrupt(void);
}
#endif
-#else
- #define bsp_smp_processor_id() 0
#endif
/**@}*/
diff --git a/cpukit/score/include/rtems/score/percpu.h b/cpukit/score/include/rtems/score/percpu.h
index bb565d92c0..383202c328 100644
--- a/cpukit/score/include/rtems/score/percpu.h
+++ b/cpukit/score/include/rtems/score/percpu.h
@@ -25,12 +25,7 @@
#include <rtems/score/isrlevel.h>
#include <rtems/score/timestamp.h>
#include <rtems/score/smplock.h>
-
- /*
- * NOTE: This file MUST be included on non-smp systems as well
- * in order to define bsp_smp_processor_id.
- */
- #include <rtems/bspsmp.h>
+ #include <rtems/score/smp.h>
#endif
/**
@@ -277,23 +272,23 @@ void _Per_CPU_Wait_for_state(
#endif
/*
- * On a non SMP system, the bsp_smp_processor_id is defined to 0.
+ * On a non SMP system, the _SMP_Get_current_processor() is defined to 0.
* Thus when built for non-SMP, there should be no performance penalty.
*/
#define _Thread_Heir \
- _Per_CPU_Information[bsp_smp_processor_id()].heir
+ _Per_CPU_Information[_SMP_Get_current_processor()].heir
#define _Thread_Executing \
- _Per_CPU_Information[bsp_smp_processor_id()].executing
+ _Per_CPU_Information[_SMP_Get_current_processor()].executing
#define _ISR_Nest_level \
- _Per_CPU_Information[bsp_smp_processor_id()].isr_nest_level
+ _Per_CPU_Information[_SMP_Get_current_processor()].isr_nest_level
#define _CPU_Interrupt_stack_low \
- _Per_CPU_Information[bsp_smp_processor_id()].interrupt_stack_low
+ _Per_CPU_Information[_SMP_Get_current_processor()].interrupt_stack_low
#define _CPU_Interrupt_stack_high \
- _Per_CPU_Information[bsp_smp_processor_id()].interrupt_stack_high
+ _Per_CPU_Information[_SMP_Get_current_processor()].interrupt_stack_high
#define _Thread_Dispatch_necessary \
- _Per_CPU_Information[bsp_smp_processor_id()].dispatch_necessary
+ _Per_CPU_Information[_SMP_Get_current_processor()].dispatch_necessary
#define _Thread_Time_of_last_context_switch \
- _Per_CPU_Information[bsp_smp_processor_id()].time_of_last_context_switch
+ _Per_CPU_Information[_SMP_Get_current_processor()].time_of_last_context_switch
#endif /* ASM */
diff --git a/cpukit/score/include/rtems/score/smp.h b/cpukit/score/include/rtems/score/smp.h
index a01515673f..fedf9ab6d7 100644
--- a/cpukit/score/include/rtems/score/smp.h
+++ b/cpukit/score/include/rtems/score/smp.h
@@ -71,7 +71,7 @@ extern "C" {
* @param[in] cpu The target processor of the message.
* @param[in] message The message.
*/
-void _SMP_Send_message( int cpu, uint32_t message );
+void _SMP_Send_message( uint32_t cpu, uint32_t message );
/**
* @brief Request of others CPUs.
@@ -116,6 +116,16 @@ void _SMP_Request_other_cores_to_shutdown(void);
/** @} */
+#if defined( RTEMS_SMP )
+ RTEMS_COMPILER_PURE_ATTRIBUTE static inline uint32_t
+ _SMP_Get_current_processor( void )
+ {
+ return _CPU_SMP_Get_current_processor();
+ }
+#else
+ #define _SMP_Get_current_processor() ( ( uint32_t ) 0 )
+#endif
+
#ifdef __cplusplus
}
#endif
diff --git a/cpukit/score/include/rtems/score/threaddispatch.h b/cpukit/score/include/rtems/score/threaddispatch.h
index e3065da590..7e7afb9161 100644
--- a/cpukit/score/include/rtems/score/threaddispatch.h
+++ b/cpukit/score/include/rtems/score/threaddispatch.h
@@ -62,8 +62,8 @@ RTEMS_INLINE_ROUTINE bool _Thread_Dispatch_is_enabled(void)
#if defined(RTEMS_SMP)
typedef struct {
SMP_lock_Control lock;
- int owner_cpu;
- int nest_level;
+ uint32_t owner_cpu;
+ uint32_t nest_level;
} Thread_Dispatch_disable_level_lock_control;
/**
diff --git a/cpukit/score/src/smp.c b/cpukit/score/src/smp.c
index fce927541b..8e06d04068 100644
--- a/cpukit/score/src/smp.c
+++ b/cpukit/score/src/smp.c
@@ -30,7 +30,7 @@
void rtems_smp_secondary_cpu_initialize( void )
{
- int self = bsp_smp_processor_id();
+ uint32_t self = _SMP_Get_current_processor();
Per_CPU_Control *per_cpu = &_Per_CPU_Information[ self ];
Thread_Control *heir;
@@ -67,7 +67,7 @@ void rtems_smp_secondary_cpu_initialize( void )
void rtems_smp_process_interrupt( void )
{
- int self = bsp_smp_processor_id();
+ uint32_t self = _SMP_Get_current_processor();
Per_CPU_Control *per_cpu = &_Per_CPU_Information[ self ];
@@ -107,7 +107,7 @@ void rtems_smp_process_interrupt( void )
}
}
-void _SMP_Send_message( int cpu, uint32_t message )
+void _SMP_Send_message( uint32_t cpu, uint32_t message )
{
Per_CPU_Control *per_cpu = &_Per_CPU_Information[ cpu ];
ISR_Level level;
@@ -126,9 +126,9 @@ void _SMP_Send_message( int cpu, uint32_t message )
void _SMP_Broadcast_message( uint32_t message )
{
- int self = bsp_smp_processor_id();
- int ncpus = _SMP_Get_processor_count();
- int cpu;
+ uint32_t self = _SMP_Get_current_processor();
+ uint32_t ncpus = _SMP_Get_processor_count();
+ uint32_t cpu;
for ( cpu = 0 ; cpu < ncpus ; ++cpu ) {
if ( cpu != self ) {
@@ -146,9 +146,9 @@ void _SMP_Broadcast_message( uint32_t message )
void _SMP_Request_other_cores_to_perform_first_context_switch( void )
{
- int self = bsp_smp_processor_id();
- int ncpus = _SMP_Get_processor_count();
- int cpu;
+ uint32_t self = _SMP_Get_current_processor();
+ uint32_t ncpus = _SMP_Get_processor_count();
+ uint32_t cpu;
for ( cpu = 0 ; cpu < ncpus ; ++cpu ) {
Per_CPU_Control *per_cpu = &_Per_CPU_Information[ cpu ];
@@ -165,9 +165,9 @@ void _SMP_Request_other_cores_to_perform_first_context_switch( void )
void _SMP_Request_other_cores_to_dispatch( void )
{
if ( _System_state_Is_up( _System_state_Get() ) ) {
- int self = bsp_smp_processor_id();
- int ncpus = _SMP_Get_processor_count();
- int cpu;
+ uint32_t self = _SMP_Get_current_processor();
+ uint32_t ncpus = _SMP_Get_processor_count();
+ uint32_t cpu;
for ( cpu = 0 ; cpu < ncpus ; ++cpu ) {
const Per_CPU_Control *per_cpu = &_Per_CPU_Information[ cpu ];
@@ -185,9 +185,9 @@ void _SMP_Request_other_cores_to_dispatch( void )
void _SMP_Request_other_cores_to_shutdown( void )
{
- int self = bsp_smp_processor_id();
- int ncpus = _SMP_Get_processor_count();
- int cpu;
+ uint32_t self = _SMP_Get_current_processor();
+ uint32_t ncpus = _SMP_Get_processor_count();
+ uint32_t cpu;
_SMP_Broadcast_message( RTEMS_BSP_SMP_SHUTDOWN );
diff --git a/cpukit/score/src/threaddispatchdisablelevel.c b/cpukit/score/src/threaddispatchdisablelevel.c
index 1f84bfe65c..d5f3ff601b 100644
--- a/cpukit/score/src/threaddispatchdisablelevel.c
+++ b/cpukit/score/src/threaddispatchdisablelevel.c
@@ -26,7 +26,7 @@
#include <rtems/score/sysstate.h>
#include <rtems/score/threaddispatch.h>
-#define NO_OWNER_CPU (-1)
+#define NO_OWNER_CPU 0xffffffffU
void _Thread_Dispatch_initialization( void )
{
@@ -48,8 +48,8 @@ uint32_t _Thread_Dispatch_increment_disable_level( void )
{
Thread_Dispatch_disable_level_lock_control *level_lock =
&_Thread_Dispatch_disable_level_lock;
- int self_cpu;
ISR_Level isr_level;
+ uint32_t self_cpu;
uint32_t disable_level;
_ISR_Disable_on_this_core( isr_level );
@@ -58,7 +58,7 @@ uint32_t _Thread_Dispatch_increment_disable_level( void )
* We must obtain the processor ID after interrupts are disabled since a
* non-optimizing compiler may store the value on the stack and read it back.
*/
- self_cpu = bsp_smp_processor_id();
+ self_cpu = _SMP_Get_current_processor();
if ( level_lock->owner_cpu != self_cpu ) {
_SMP_lock_Acquire( &level_lock->lock );