2010-05-10 Joel Sherrill <joel.sherrilL@OARcorp.com>

	* context_init.c, context_switch.S, cpu.c: Now builds multilib. R8C
	paths produce warnings for now.

4 files changed, 31 insertions, 4 deletions

diff --git a/cpukit/score/cpu/m32c/ChangeLog b/cpukit/score/cpu/m32c/ChangeLog
index ec52b6644c..694bee7ced 100644
--- a/cpukit/score/cpu/m32c/ChangeLog
+++ b/cpukit/score/cpu/m32c/ChangeLog
@@ -1,3 +1,8 @@
+2010-05-10	Joel Sherrill <joel.sherrilL@OARcorp.com>
+
+	* context_init.c, context_switch.S, cpu.c: Now builds multilib. R8C
+	paths produce warnings for now.
+
 2010-04-25	Joel Sherrill <joel.sherrilL@OARcorp.com>
 
 	* context_init.c: Eliminate warnings.
diff --git a/cpukit/score/cpu/m32c/context_init.c b/cpukit/score/cpu/m32c/context_init.c
index 4558330be0..d6f9f703c1 100644
--- a/cpukit/score/cpu/m32c/context_init.c
+++ b/cpukit/score/cpu/m32c/context_init.c
@@ -31,8 +31,13 @@ typedef struct {
   uint16_t zero;
 } Starting_Frame;
 
-#define _get_sb( _sb ) \
-  asm volatile( "stc sb, %0" : "=r" (_sb))
+#if defined(__r8c_cpu__)
+  #warning "_get_sb: not implemented on R8C"
+  #define _get_sb( _sb )
+#else
+  #define _get_sb( _sb ) \
+    asm volatile( "stc sb, %0" : "=r" (_sb))
+#endif
 
 void _CPU_Context_Initialize(
   Context_Control  *the_context,
@@ -63,11 +68,14 @@ void _CPU_Context_Initialize(
   frame->a1 =0xa1a2a3a4;
   frame->r0r2 = 0;
   frame->r1r3 = 0;
+#if defined(__r8c_cpu__)
+  #warning "not implemented on R8C"
+#else
   frame->frameLow  = (uint16_t) (((uint32_t)frame)  & 0xffff);
   frame->frameHigh = (uint16_t) (((uint32_t)frame >> 16) & 0xffff);
   frame->startLow  = (uint16_t) (((uint32_t)entry_point) & 0xffff);
   frame->startHigh = (uint16_t) (((uint32_t)entry_point >> 16) & 0xffff);
-
+#endif
   the_context->sp = (uintptr_t)frame;
   the_context->fb = (uintptr_t)&frame->frameLow;
 }
diff --git a/cpukit/score/cpu/m32c/context_switch.S b/cpukit/score/cpu/m32c/context_switch.S
index 0060ce1898..e3bb695555 100644
--- a/cpukit/score/cpu/m32c/context_switch.S
+++ b/cpukit/score/cpu/m32c/context_switch.S
@@ -31,6 +31,9 @@ __CPU_Context_switch:
 	pushc	flg
 	pushc	sb
 
+#if defined(__r8c_cpu__)
+  #warning "not implemented on R8C"
+#else
 	mov.l	ARG_EXECUTING[fb],a0	; a0 = executing
 	stc  	fb,a1
 	mov.l	a1,CTXT_FB[a0]		; save fb
@@ -44,6 +47,7 @@ restore:
 	ldc  	a1,sp			; restore sp
 	mov.l	CTXT_FB[a0],a1
 	ldc  	a1,fb			; restore fb
+#endif
 	popc	sb
 	popc	flg
 	popm 	a0,a1,r0,r1,r2,r3
@@ -56,5 +60,9 @@ restore:
 	.type	__CPU_Context_Restart_self, @function
 __CPU_Context_Restart_self:
 	enter	#0
+#if defined(__r8c_cpu__)
+  #warning "__CPU_Context_Restart_self: not implemented on R8C"
+#else
 	mov.l	ARG_RESTART[fb],a0	; a0 = heir
 	jmp.s	restore
+#endif
diff --git a/cpukit/score/cpu/m32c/cpu.c b/cpukit/score/cpu/m32c/cpu.c
index 20b949e174..41100e0d96 100644
--- a/cpukit/score/cpu/m32c/cpu.c
+++ b/cpukit/score/cpu/m32c/cpu.c
@@ -32,7 +32,9 @@
 
 void _CPU_Initialize(void)
 {
-  asm volatile( "ldc    #__var_vects,intb" );
+  #if !defined(__r8c_cpu__)
+    asm volatile( "ldc    #__var_vects,intb" );
+  #endif
 }
 
 /*
@@ -70,7 +72,11 @@ void _CPU_ISR_install_raw_handler(
    *  This is where we install the interrupt handler into the "raw" interrupt
    *  table used by the CPU to dispatch interrupt handlers.
    */
+#if defined(__r8c_cpu__)
+  #warning "_CPU_ISR_install_raw_handler not implemented on R8C"
+#else
   _set_var_vect(new_handler,vector);
+#endif
 }
 
 /*PAGE