summaryrefslogtreecommitdiffstats
path: root/cpukit/score/src/threadhandler.c
diff options
context:
space:
mode:
authorSebastian Huber <sebastian.huber@embedded-brains.de>2016-11-11 14:37:51 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2016-11-18 07:30:34 +0100
commitd5e073cde70211b2471e4366be397370e9f6ce48 (patch)
tree7ee1e3cad3dd7dfbb52475af7bacc61b216dc0e5 /cpukit/score/src/threadhandler.c
parentscore: Add Per_CPU_Control::Interrupt_frame (diff)
downloadrtems-d5e073cde70211b2471e4366be397370e9f6ce48.tar.bz2
score: Allow interrupts during thread dispatch
Use a processor-specific interrupt frame during context switches in case the executing thread is longer executes on the processor and the heir thread is about to start execution. During this period we must not use a thread stack for interrupt processing. Update #2809.
Diffstat (limited to '')
-rw-r--r--cpukit/score/src/threadhandler.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/cpukit/score/src/threadhandler.c b/cpukit/score/src/threadhandler.c
index 397e0cf95a..a8d65804af 100644
--- a/cpukit/score/src/threadhandler.c
+++ b/cpukit/score/src/threadhandler.c
@@ -38,9 +38,6 @@ void _Thread_Handler( void )
_Context_Initialization_at_thread_begin();
executing = _Thread_Executing;
- /* On SMP we enter _Thread_Handler() with interrupts disabled */
- _SMP_Assert( _ISR_Get_level() != 0 );
-
/*
* have to put level into a register for those cpu's that use
* inline asm here