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authorSebastian Huber <sebastian.huber@embedded-brains.de>2013-08-23 16:15:50 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2013-08-30 11:16:28 +0200
commitbf30999cc697325eda3afd1833b78a7e64255fc4 (patch)
treebc365daf0a3c0e6fe7c72cfe33c7603f7da54351 /cpukit/score/src/threaddispatch.c
parentsapi: SMP support for chains (diff)
downloadrtems-bf30999cc697325eda3afd1833b78a7e64255fc4.tar.bz2
smp: Add and use _Assert_Owner_of_giant()
Add and use _ISR_Disable_without_giant() and _ISR_Enable_without_giant() if RTEMS_SMP is defined. On single processor systems the ISR disable/enable was the big hammer which ensured system-wide mutual exclusion. On SMP configurations this no longer works since other processors do not care about disabled interrupts on this processor and continue to execute freely. On SMP in addition to ISR disable/enable an SMP lock must be used. Currently we have only the Giant lock so we can check easily that ISR disable/enable is used only in the right context.
Diffstat (limited to 'cpukit/score/src/threaddispatch.c')
-rw-r--r--cpukit/score/src/threaddispatch.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/cpukit/score/src/threaddispatch.c b/cpukit/score/src/threaddispatch.c
index 3b5fb429cf..0c8298f15f 100644
--- a/cpukit/score/src/threaddispatch.c
+++ b/cpukit/score/src/threaddispatch.c
@@ -35,7 +35,7 @@ void _Thread_Dispatch( void )
ISR_Level level;
#if defined( RTEMS_SMP )
- _ISR_Disable( level );
+ _ISR_Disable_without_giant( level );
#endif
per_cpu = _Per_CPU_Get();
@@ -43,7 +43,7 @@ void _Thread_Dispatch( void )
per_cpu->thread_dispatch_disable_level = 1;
#if defined( RTEMS_SMP )
- _ISR_Enable( level );
+ _ISR_Enable_without_giant( level );
#endif
/*