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authorJoel Sherrill <joel.sherrill@OARcorp.com>2000-11-30 14:08:30 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>2000-11-30 14:08:30 +0000
commit43b6f757ce6127d95778fe2eaa9e3a9fc3a06ae3 (patch)
treeb8cce290191ffcee0ce79451897a0ce89aec6af2 /cpukit/score/macros
parent2000-11-30 Joel Sherrill <joel@OARcorp.com> (diff)
downloadrtems-43b6f757ce6127d95778fe2eaa9e3a9fc3a06ae3.tar.bz2
2000-11-30 Joel Sherrill <joel@OARcorp.com>
* General effort to make things compile with macros not inlines * inline/rtems/score/coremutex.inl: Added comment indicating for macros there is another copy of _CORE_mutex_Seize_interrupt_trylock() in src/coremutexseize.c. * src/coremutexseize.c: Added body of _CORE_mutex_Seize_interrupt_trylock() for macro case. * macros/rtems/score/coremutex.inl: Added prototype for _CORE_mutex_Seize_interrupt_trylock() since there is a real body when macros are enabled. * macros/rtems/score/coresem.inl: Added macro implementation of _CORE_semaphore_Seize_isr_disable. * macros/score/Makefile.am: Fixed typos. * rtems/score/address.inl: Correct macro implementation of _Addresses_Is_aligned() so it would compile. * macros/rtems/score/coremsg.inl: Added closing parentheses.
Diffstat (limited to 'cpukit/score/macros')
-rw-r--r--cpukit/score/macros/rtems/score/address.inl4
-rw-r--r--cpukit/score/macros/rtems/score/coremsg.inl6
-rw-r--r--cpukit/score/macros/rtems/score/coremutex.inl14
-rw-r--r--cpukit/score/macros/rtems/score/coresem.inl43
4 files changed, 63 insertions, 4 deletions
diff --git a/cpukit/score/macros/rtems/score/address.inl b/cpukit/score/macros/rtems/score/address.inl
index 10623b1f76..24f9dc12e5 100644
--- a/cpukit/score/macros/rtems/score/address.inl
+++ b/cpukit/score/macros/rtems/score/address.inl
@@ -52,12 +52,14 @@
*/
#if (CPU_ALIGNMENT == 0)
+#define _Addresses_Is_aligned( _address ) \
(TRUE)
#elif defined(RTEMS_CPU_HAS_16_BIT_ADDRESSES)
+#define _Addresses_Is_aligned( _address ) \
( ( (unsigned short)(_address) % CPU_ALIGNMENT ) == 0 )
+#else
#define _Addresses_Is_aligned( _address ) \
( ( (unsigned32)(_address) % CPU_ALIGNMENT ) == 0 )
-#else
#endif
/*PAGE
diff --git a/cpukit/score/macros/rtems/score/coremsg.inl b/cpukit/score/macros/rtems/score/coremsg.inl
index 0717b3eea3..c37c307287 100644
--- a/cpukit/score/macros/rtems/score/coremsg.inl
+++ b/cpukit/score/macros/rtems/score/coremsg.inl
@@ -21,12 +21,12 @@
* _CORE_message_queue_Send
*
*/
-
+
#define _CORE_message_queue_Send( _the_message_queue, _buffer, _size, \
_id, _api_message_queue_mp_support, _wait, _timeout ) \
_CORE_message_queue_Submit( (_the_message_queue), (_buffer), (_size), \
(_id), (_api_message_queue_mp_support), \
- CORE_MESSAGE_QUEUE_SEND_REQUEST, (_wait), (_timeout)
+ CORE_MESSAGE_QUEUE_SEND_REQUEST, (_wait), (_timeout) )
/*PAGE
*
@@ -38,7 +38,7 @@
_id, _api_message_queue_mp_support, _wait, _timeout ) \
_CORE_message_queue_Submit( (_the_message_queue), (_buffer), (_size), \
(_id), (_api_message_queue_mp_support), \
- CORE_MESSAGE_QUEUE_URGENT_REQUEST, (_wait), (_timeout)
+ CORE_MESSAGE_QUEUE_URGENT_REQUEST, (_wait), (_timeout) )
/*PAGE
*
diff --git a/cpukit/score/macros/rtems/score/coremutex.inl b/cpukit/score/macros/rtems/score/coremutex.inl
index be6f483dae..90323374e5 100644
--- a/cpukit/score/macros/rtems/score/coremutex.inl
+++ b/cpukit/score/macros/rtems/score/coremutex.inl
@@ -63,5 +63,19 @@
#define _CORE_mutex_Is_priority_ceiling( _the_attribute )\
( (_the_attribute)->discipline == CORE_MUTEX_DISCIPLINES_PRIORITY_CEILING )
+/*PAGE
+ *
+ * _CORE_mutex_Seize_interrupt_trylock
+ *
+ * NOTE: This is not really a MACRO version of this routine.
+ * A body is in coremutexseize.c that is duplicated
+ * from the .inl by hand.
+ */
+
+int _CORE_mutex_Seize_interrupt_trylock(
+ CORE_mutex_Control *the_mutex,
+ ISR_Level *level_p
+);
+
#endif
/* end of include file */
diff --git a/cpukit/score/macros/rtems/score/coresem.inl b/cpukit/score/macros/rtems/score/coresem.inl
index 904b004cc6..01590c23b4 100644
--- a/cpukit/score/macros/rtems/score/coresem.inl
+++ b/cpukit/score/macros/rtems/score/coresem.inl
@@ -34,6 +34,49 @@
#define _Core_semaphore_Get_count( _the_semaphore ) \
( (_the_semaphore)->count )
+/*PAGE
+ *
+ * _CORE_semaphore_Seize_isr_disable
+ *
+ * DESCRIPTION:
+ *
+ * This routine attempts to receive a unit from the_semaphore.
+ * If a unit is available or if the wait flag is FALSE, then the routine
+ * returns. Otherwise, the calling task is blocked until a unit becomes
+ * available.
+ *
+ * NOTE: There is currently no MACRO version of this routine.
+ */
+
+#define _CORE_semaphore_Seize_isr_disable( \
+ _the_semaphore, _id, _wait, _timeout, _level_p) \
+{ \
+ Thread_Control *executing; \
+ ISR_Level level = *(_level_p); \
+ \
+ /* disabled when you get here */ \
+ \
+ executing = _Thread_Executing; \
+ executing->Wait.return_code = CORE_SEMAPHORE_STATUS_SUCCESSFUL; \
+ if ( (_the_semaphore)->count != 0 ) { \
+ (_the_semaphore)->count -= 1; \
+ _ISR_Enable( level ); \
+ } else if ( !(_wait) ) { \
+ _ISR_Enable( level ); \
+ executing->Wait.return_code = CORE_SEMAPHORE_STATUS_UNSATISFIED_NOWAIT; \
+ } else { \
+ _Thread_Disable_dispatch(); \
+ _ISR_Enable( level ); \
+ _Thread_queue_Enter_critical_section( &(_the_semaphore)->Wait_queue ); \
+ executing->Wait.queue = &(_the_semaphore)->Wait_queue; \
+ executing->Wait.id = (_id); \
+ _ISR_Enable( level ); \
+ \
+ _Thread_queue_Enqueue( &(_the_semaphore)->Wait_queue, (_timeout) ); \
+ _Thread_Enable_dispatch(); \
+ } \
+}
+
#endif
/* end of include file */