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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2016-11-14 14:42:56 +0100 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2016-11-18 07:30:34 +0100 |
commit | c11ac2d59dce04b189948dd851b1f1eb6f9a4a52 (patch) | |
tree | 10114a822aa8bab90683fc7d4ea530db51abdf0e /cpukit/score/cpu | |
parent | score: Allow interrupts during thread dispatch (diff) | |
download | rtems-c11ac2d59dce04b189948dd851b1f1eb6f9a4a52.tar.bz2 |
sparc: Use Per_CPU_Control::isr_dispatch_disable
Update #2751.
Diffstat (limited to '')
-rw-r--r-- | cpukit/score/cpu/sparc/cpu.c | 6 | ||||
-rw-r--r-- | cpukit/score/cpu/sparc/rtems/score/cpuimpl.h | 21 |
2 files changed, 5 insertions, 22 deletions
diff --git a/cpukit/score/cpu/sparc/cpu.c b/cpukit/score/cpu/sparc/cpu.c index 4aa30dbaef..a640849bee 100644 --- a/cpukit/score/cpu/sparc/cpu.c +++ b/cpukit/score/cpu/sparc/cpu.c @@ -23,12 +23,6 @@ #include <rtems/score/tls.h> #include <rtems/rtems/cache.h> -RTEMS_STATIC_ASSERT( - offsetof( Per_CPU_Control, cpu_per_cpu.isr_dispatch_disable) - == SPARC_PER_CPU_ISR_DISPATCH_DISABLE, - SPARC_PER_CPU_ISR_DISPATCH_DISABLE -); - #if SPARC_HAS_FPU == 1 RTEMS_STATIC_ASSERT( offsetof( Per_CPU_Control, cpu_per_cpu.fsr) diff --git a/cpukit/score/cpu/sparc/rtems/score/cpuimpl.h b/cpukit/score/cpu/sparc/rtems/score/cpuimpl.h index 51071ab267..5563db8911 100644 --- a/cpukit/score/cpu/sparc/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/sparc/rtems/score/cpuimpl.h @@ -70,21 +70,15 @@ #if ( SPARC_HAS_FPU == 1 ) #define CPU_PER_CPU_CONTROL_SIZE 8 #else - #define CPU_PER_CPU_CONTROL_SIZE 4 + #define CPU_PER_CPU_CONTROL_SIZE 0 #endif -/** - * @brief Offset of the CPU_Per_CPU_control::isr_dispatch_disable field - * relative to the Per_CPU_Control begin. - */ -#define SPARC_PER_CPU_ISR_DISPATCH_DISABLE 0 - #if ( SPARC_HAS_FPU == 1 ) /** * @brief Offset of the CPU_Per_CPU_control::fsr field relative to the * Per_CPU_Control begin. */ - #define SPARC_PER_CPU_FSR_OFFSET 4 + #define SPARC_PER_CPU_FSR_OFFSET 0 #endif #ifndef ASM @@ -94,14 +88,6 @@ extern "C" { #endif typedef struct { - /** - * This flag is context switched with each thread. It indicates - * that THIS thread has an _ISR_Dispatch stack frame on its stack. - * By using this flag, we can avoid nesting more interrupt dispatching - * attempts on a previously interrupted thread's stack. - */ - uint32_t isr_dispatch_disable; - #if ( SPARC_HAS_FPU == 1 ) /** * @brief Memory location to store the FSR register during interrupt @@ -111,6 +97,9 @@ typedef struct { * floating point operations in progress. */ uint32_t fsr; + + /* See Per_CPU_Control::Interrupt_frame */ + uint32_t reserved_for_alignment_of_interrupt_frame; #endif } CPU_Per_CPU_control; |