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| author | Kinsey Moore <kinsey.moore@oarcorp.com> | 2021-02-15 09:05:10 -0600 |
|---|---|---|
| committer | Joel Sherrill <joel@rtems.org> | 2021-03-05 08:43:15 -0600 |
| commit | 9951cee08f3a511a460eadfc2e5490d890cfd3b8 (patch) | |
| tree | 504d1afabf2b01544f9b7b937e64154d03cb1f94 /cpukit/score/cpu | |
| parent | spec: Move hypervisor start for use by AArch64 (diff) | |
| download | rtems-9951cee08f3a511a460eadfc2e5490d890cfd3b8.tar.bz2 | |
bsps/aarch64: RTEMS_DEBUG stack alignment faults
Run with stack alignment faults enabled under RTEMS_DEBUG to catch any
stack misalignments early. This makes it easier to track them down
should they ever occur.
Diffstat (limited to 'cpukit/score/cpu')
| -rw-r--r-- | cpukit/score/cpu/aarch64/aarch64-exception-default.S | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/cpukit/score/cpu/aarch64/aarch64-exception-default.S b/cpukit/score/cpu/aarch64/aarch64-exception-default.S index 970ccf735f..d139fdc6a4 100644 --- a/cpukit/score/cpu/aarch64/aarch64-exception-default.S +++ b/cpukit/score/cpu/aarch64/aarch64-exception-default.S @@ -76,7 +76,7 @@ * TODO(kmoore) The current implementation here assumes that SP is not * misaligned. */ - .macro JUMP_HANDLER + .macro JUMP_HANDLER_SHORT /* Mask to use in BIC, lower 7 bits */ mov x0, #0x7f /* LR contains PC, mask off to the base of the current vector */ @@ -113,6 +113,10 @@ nop nop nop + .endm + + .macro JUMP_HANDLER + JUMP_HANDLER_SHORT nop .endm @@ -182,10 +186,12 @@ curr_el_sp0_serror_get_pc: /* The current PC is now in LR */ * the current SP. */ curr_el_spx_sync: + msr SCTLR_EL1, XZR stp x0, lr, [sp, #-0x10]! /* Push x0,lr on to the stack */ bl curr_el_spx_sync_get_pc /* Get current execution address */ curr_el_spx_sync_get_pc: /* The current PC is now in LR */ - JUMP_HANDLER +/* Use short jump handler since this has an extra instruction to clear SCTLR */ + JUMP_HANDLER_SHORT JUMP_TARGET_SPx .balign 0x80 /* |