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authorJoel Sherrill <joel.sherrill@OARcorp.com>1999-08-19 22:07:00 +0000
committerJoel Sherrill <joel.sherrill@OARcorp.com>1999-08-19 22:07:00 +0000
commit71f16a4499356b1f170f11307691aec227e28bba (patch)
treefd147412f9874dabac32608d60cc29fb58517eba /cpukit/score/cpu
parentSupport for MPC505 from Sergei Organov <osv@Javad.RU>. His patch was (diff)
downloadrtems-71f16a4499356b1f170f11307691aec227e28bba.tar.bz2
Support for MPC505 from Sergei Organov <osv@Javad.RU>. His patch was
against 3.6.0 so was painful to merge. It should be OK but there is no guarantee and there are no BSPs in the tree to exercise it.
Diffstat (limited to 'cpukit/score/cpu')
-rw-r--r--cpukit/score/cpu/powerpc/rtems/score/ppc.h17
1 files changed, 17 insertions, 0 deletions
diff --git a/cpukit/score/cpu/powerpc/rtems/score/ppc.h b/cpukit/score/cpu/powerpc/rtems/score/ppc.h
index 27f8a4cfc1..68aaad18ce 100644
--- a/cpukit/score/cpu/powerpc/rtems/score/ppc.h
+++ b/cpukit/score/cpu/powerpc/rtems/score/ppc.h
@@ -116,7 +116,24 @@ extern "C" {
#define PPC_HAS_EXCEPTION_PREFIX 0
#define PPC_HAS_EVPR 1
+
+#elif defined(mpc505) || defined(mpc509)
+/*
+ * Submitted by Sergei Organov <osv@Javad.RU> as a patch against
+ * 3.6.0 long after 4.0 was released. This is just an attempt
+ * to get the setting correct.
+ */
+
+#define CPU_MODEL_NAME "PowerPC 505/509"
+
+#define PPC_ALIGNMENT 4
+#define PPC_CACHE_ALIGNMENT 16
+#define PPC_I_CACHE 4096
+#define PPC_I_CACHE 0
+
+
#elif defined(ppc601)
+
/*
* Submitted with original port -- book checked only.
*/