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authorSebastian Huber <sebastian.huber@embedded-brains.de>2019-03-25 10:45:25 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2019-03-26 11:27:53 +0100
commit5526527e5111c0fc5b6daaee63edc21f658410a6 (patch)
treee26df8177c0971546d0f7d1f3d1f9edd2fa8b998 /cpukit/score/cpu
parentscore: Add implementation top-level group (diff)
downloadrtems-5526527e5111c0fc5b6daaee63edc21f658410a6.tar.bz2
score: Rename ScoreCPU Doxygen group
Update #3706.
Diffstat (limited to 'cpukit/score/cpu')
-rw-r--r--cpukit/score/cpu/arm/arm_exc_abort.S2
-rw-r--r--cpukit/score/cpu/arm/arm_exc_interrupt.S2
-rw-r--r--cpukit/score/cpu/arm/cpu.c2
-rw-r--r--cpukit/score/cpu/arm/cpu_asm.S2
-rw-r--r--cpukit/score/cpu/arm/include/rtems/asm.h2
-rw-r--r--cpukit/score/cpu/arm/include/rtems/score/arm.h2
-rw-r--r--cpukit/score/cpu/arm/include/rtems/score/cpu.h6
-rw-r--r--cpukit/score/cpu/arm/include/rtems/score/cpu_asm.h2
-rw-r--r--cpukit/score/cpu/epiphany/epiphany-exception-handler.S2
-rw-r--r--cpukit/score/cpu/epiphany/include/rtems/score/epiphany-utility.h2
-rw-r--r--cpukit/score/cpu/mips/include/rtems/score/cpu.h2
-rw-r--r--cpukit/score/cpu/or1k/or1k-exception-handler-low.S2
-rw-r--r--cpukit/score/cpu/riscv/riscv-exception-handler.S2
13 files changed, 15 insertions, 15 deletions
diff --git a/cpukit/score/cpu/arm/arm_exc_abort.S b/cpukit/score/cpu/arm/arm_exc_abort.S
index 35f08ee84f..c044c0a47f 100644
--- a/cpukit/score/cpu/arm/arm_exc_abort.S
+++ b/cpukit/score/cpu/arm/arm_exc_abort.S
@@ -1,7 +1,7 @@
/**
* @file
*
- * @ingroup ScoreCPU
+ * @ingroup RTEMSScoreCPU
*
* @brief ARM data and prefetch abort exception prologue and epilogue.
*/
diff --git a/cpukit/score/cpu/arm/arm_exc_interrupt.S b/cpukit/score/cpu/arm/arm_exc_interrupt.S
index daa7038b0f..5afd12d13c 100644
--- a/cpukit/score/cpu/arm/arm_exc_interrupt.S
+++ b/cpukit/score/cpu/arm/arm_exc_interrupt.S
@@ -1,7 +1,7 @@
/**
* @file
*
- * @ingroup ScoreCPU
+ * @ingroup RTEMSScoreCPU
*
* @brief ARM interrupt exception prologue and epilogue.
*/
diff --git a/cpukit/score/cpu/arm/cpu.c b/cpukit/score/cpu/arm/cpu.c
index 63c31a598d..fe621a2192 100644
--- a/cpukit/score/cpu/arm/cpu.c
+++ b/cpukit/score/cpu/arm/cpu.c
@@ -1,7 +1,7 @@
/**
* @file
*
- * @ingroup ScoreCPU
+ * @ingroup RTEMSScoreCPU
*
* @brief ARM architecture support implementation.
*/
diff --git a/cpukit/score/cpu/arm/cpu_asm.S b/cpukit/score/cpu/arm/cpu_asm.S
index f58b99dc6c..ea6306ac03 100644
--- a/cpukit/score/cpu/arm/cpu_asm.S
+++ b/cpukit/score/cpu/arm/cpu_asm.S
@@ -1,7 +1,7 @@
/**
* @file
*
- * @ingroup ScoreCPU
+ * @ingroup RTEMSScoreCPU
*
* @brief ARM architecture support implementation.
*/
diff --git a/cpukit/score/cpu/arm/include/rtems/asm.h b/cpukit/score/cpu/arm/include/rtems/asm.h
index f72df32325..c868b45248 100644
--- a/cpukit/score/cpu/arm/include/rtems/asm.h
+++ b/cpukit/score/cpu/arm/include/rtems/asm.h
@@ -46,7 +46,7 @@
/**
* @defgroup ScoreCPUARMASM ARM Assembler Support
*
- * @ingroup ScoreCPU
+ * @ingroup RTEMSScoreCPU
*
* @brief ARM Assembler Support
*/
diff --git a/cpukit/score/cpu/arm/include/rtems/score/arm.h b/cpukit/score/cpu/arm/include/rtems/score/arm.h
index bff4044a99..f8a5470bfb 100644
--- a/cpukit/score/cpu/arm/include/rtems/score/arm.h
+++ b/cpukit/score/cpu/arm/include/rtems/score/arm.h
@@ -25,7 +25,7 @@ extern "C" {
#endif
/**
- * @addtogroup ScoreCPU
+ * @addtogroup RTEMSScoreCPU
*/
/**@{**/
diff --git a/cpukit/score/cpu/arm/include/rtems/score/cpu.h b/cpukit/score/cpu/arm/include/rtems/score/cpu.h
index bb8270df10..3737246f9a 100644
--- a/cpukit/score/cpu/arm/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/arm/include/rtems/score/cpu.h
@@ -40,7 +40,7 @@
/**
* @defgroup ScoreCPUARM ARM Specific Support
*
- * @ingroup ScoreCPU
+ * @ingroup RTEMSScoreCPU
*
* @brief ARM specific support.
*/
@@ -96,7 +96,7 @@
#endif /* defined(ARM_MULTILIB_ARCH_V4) */
/**
- * @addtogroup ScoreCPU
+ * @addtogroup RTEMSScoreCPU
*/
/**@{**/
@@ -206,7 +206,7 @@ extern "C" {
#endif
/**
- * @addtogroup ScoreCPU
+ * @addtogroup RTEMSScoreCPU
*/
/**@{**/
diff --git a/cpukit/score/cpu/arm/include/rtems/score/cpu_asm.h b/cpukit/score/cpu/arm/include/rtems/score/cpu_asm.h
index c430911373..c910ae6821 100644
--- a/cpukit/score/cpu/arm/include/rtems/score/cpu_asm.h
+++ b/cpukit/score/cpu/arm/include/rtems/score/cpu_asm.h
@@ -1,7 +1,7 @@
/**
* @file
*
- * @ingroup ScoreCPU
+ * @ingroup RTEMSScoreCPU
*
* @brief ARM Assembler Support API
*/
diff --git a/cpukit/score/cpu/epiphany/epiphany-exception-handler.S b/cpukit/score/cpu/epiphany/epiphany-exception-handler.S
index 23f0947cb4..a65db17a5b 100644
--- a/cpukit/score/cpu/epiphany/epiphany-exception-handler.S
+++ b/cpukit/score/cpu/epiphany/epiphany-exception-handler.S
@@ -1,7 +1,7 @@
/**
* @file
*
- * @ingroup ScoreCPU
+ * @ingroup RTEMSScoreCPU
*
* @brief Epiphany exception support implementation.
*/
diff --git a/cpukit/score/cpu/epiphany/include/rtems/score/epiphany-utility.h b/cpukit/score/cpu/epiphany/include/rtems/score/epiphany-utility.h
index 04cb2de28c..bc7ec42adf 100644
--- a/cpukit/score/cpu/epiphany/include/rtems/score/epiphany-utility.h
+++ b/cpukit/score/cpu/epiphany/include/rtems/score/epiphany-utility.h
@@ -1,7 +1,7 @@
/**
* @file
*
- * @ingroup ScoreCPU
+ * @ingroup RTEMSScoreCPU
*
* @brief This include file contains macros pertaining to the
* Epiphany processor family.
diff --git a/cpukit/score/cpu/mips/include/rtems/score/cpu.h b/cpukit/score/cpu/mips/include/rtems/score/cpu.h
index 6818fb49ec..1cb31983c7 100644
--- a/cpukit/score/cpu/mips/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/mips/include/rtems/score/cpu.h
@@ -45,7 +45,7 @@
#define _RTEMS_SCORE_CPU_H
/**
- * @defgroup ScoreCPU CPU CPU
+ * @defgroup RTEMSScoreCPU CPU CPU
*
* @ingroup Score
*
diff --git a/cpukit/score/cpu/or1k/or1k-exception-handler-low.S b/cpukit/score/cpu/or1k/or1k-exception-handler-low.S
index 96d0c8e740..cbf69df9fc 100644
--- a/cpukit/score/cpu/or1k/or1k-exception-handler-low.S
+++ b/cpukit/score/cpu/or1k/or1k-exception-handler-low.S
@@ -1,7 +1,7 @@
/**
* @file
*
- * @ingroup ScoreCPU
+ * @ingroup RTEMSScoreCPU
*
* @brief OR1K exception support implementation.
*/
diff --git a/cpukit/score/cpu/riscv/riscv-exception-handler.S b/cpukit/score/cpu/riscv/riscv-exception-handler.S
index 897a15cd11..ddb8f39d97 100644
--- a/cpukit/score/cpu/riscv/riscv-exception-handler.S
+++ b/cpukit/score/cpu/riscv/riscv-exception-handler.S
@@ -1,7 +1,7 @@
/**
* @file
*
- * @ingroup ScoreCPU
+ * @ingroup RTEMSScoreCPU
*
* @brief RISC-V exception support implementation.
*/