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| author | Kinsey Moore <kinsey.moore@oarcorp.com> | 2021-10-25 09:53:44 -0500 |
|---|---|---|
| committer | Joel Sherrill <joel@rtems.org> | 2021-11-01 08:39:00 -0500 |
| commit | 2d27725838c7e61abf092e8ca8a89f17a35cc6bf (patch) | |
| tree | c722289673c38aeeed22461558051044c13d26f6 /cpukit/score/cpu | |
| parent | bsps/aarch64: Add missing MMU map recursion check (diff) | |
| download | rtems-2d27725838c7e61abf092e8ca8a89f17a35cc6bf.tar.bz2 | |
bsps/aarch64: Set interrupt level correctly
The existing code is functional but inccorrect and blindly modifies the
other masking bits. It is important to preserve those other bits since
they control masking of important system events.
Diffstat (limited to 'cpukit/score/cpu')
| -rw-r--r-- | cpukit/score/cpu/aarch64/cpu.c | 16 |
1 files changed, 11 insertions, 5 deletions
diff --git a/cpukit/score/cpu/aarch64/cpu.c b/cpukit/score/cpu/aarch64/cpu.c index b36f55ae17..88e7ad8a8c 100644 --- a/cpukit/score/cpu/aarch64/cpu.c +++ b/cpukit/score/cpu/aarch64/cpu.c @@ -149,11 +149,17 @@ void _CPU_Context_Initialize( void _CPU_ISR_Set_level( uint32_t level ) { /* Set the mask bit if interrupts are disabled */ - level = level ? AARCH64_PSTATE_I : 0; - __asm__ volatile ( - "msr DAIF, %[level]\n" - : : [level] "r" (level) - ); + if ( level ) { + __asm__ volatile ( + "msr DAIFSet, #0x2\n" + : : [level] "r" (level) + ); + } else { + __asm__ volatile ( + "msr DAIFClr, #0x2\n" + : : [level] "r" (level) + ); + } } uint32_t _CPU_ISR_Get_level( void ) |