summaryrefslogtreecommitdiffstats
path: root/cpukit/score/cpu/v850/rtems/score/v850.h
diff options
context:
space:
mode:
authorJoel Sherrill <joel.sherrill@oarcorp.com>2012-06-12 17:57:35 -0500
committerJoel Sherrill <joel.sherrill@oarcorp.com>2012-06-12 17:58:33 -0500
commit918dbb6d53aca9f2ac193173739c16786cba8f1d (patch)
tree9d1d2ae445222b355c73be96a9703baf5c93253d /cpukit/score/cpu/v850/rtems/score/v850.h
parentbsps: Replace NIRVANA region (diff)
downloadrtems-918dbb6d53aca9f2ac193173739c16786cba8f1d.tar.bz2
v850 port: byte swap instructions not available on all multilibs
Diffstat (limited to '')
-rw-r--r--cpukit/score/cpu/v850/rtems/score/v850.h9
1 files changed, 8 insertions, 1 deletions
diff --git a/cpukit/score/cpu/v850/rtems/score/v850.h b/cpukit/score/cpu/v850/rtems/score/v850.h
index b76ddbcd0b..3e9bec56f3 100644
--- a/cpukit/score/cpu/v850/rtems/score/v850.h
+++ b/cpukit/score/cpu/v850/rtems/score/v850.h
@@ -40,30 +40,37 @@ extern "C" {
*/
#define CPU_MODEL_NAME "rtems_multilib"
#define V850_HAS_FPU 0
+#define V850_HAS_BYTE_SWAP_INSTRUCTION 0
#elif defined(__v850e2v3__)
#define CPU_MODEL_NAME "v850e2v3"
#define V850_HAS_FPU 1
+#define V850_HAS_BYTE_SWAP_INSTRUCTION 1
#elif defined(__v850e2__)
#define CPU_MODEL_NAME "v850e2"
#define V850_HAS_FPU 0
+#define V850_HAS_BYTE_SWAP_INSTRUCTION 1
#elif defined(__v850es__)
#define CPU_MODEL_NAME "v850es"
#define V850_HAS_FPU 0
+#define V850_HAS_BYTE_SWAP_INSTRUCTION 1
#elif defined(__v850e1__)
#define CPU_MODEL_NAME "v850e1"
#define V850_HAS_FPU 0
+#define V850_HAS_BYTE_SWAP_INSTRUCTION 1
#elif defined(__v850e__)
#define CPU_MODEL_NAME "v850e"
#define V850_HAS_FPU 0
+#define V850_HAS_BYTE_SWAP_INSTRUCTION 1
#else
#define CPU_MODEL_NAME "v850"
-#define V850_HAS_FPU 0
+#define V850_HAS_FPU 0
+#define V850_HAS_BYTE_SWAP_INSTRUCTION 0
#endif