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authorRalf Corsepius <ralf.corsepius@rtems.org>2004-03-30 11:49:14 +0000
committerRalf Corsepius <ralf.corsepius@rtems.org>2004-03-30 11:49:14 +0000
commitc346f33d6df5aba8e1ce76d61a2357529ab6e353 (patch)
tree899d3710bf2cb2831cdd2bf45e7421e3ac76e0b4 /cpukit/score/cpu/unix
parent2004-03-30 Ralf Corsepius <ralf_corsepius@rtems.org> (diff)
downloadrtems-c346f33d6df5aba8e1ce76d61a2357529ab6e353.tar.bz2
2004-03-30 Ralf Corsepius <ralf_corsepius@rtems.org>
* cpu.c, rtems/score/cpu.h: Convert to using c99 fixed size types.
Diffstat (limited to '')
-rw-r--r--cpukit/score/cpu/unix/ChangeLog4
-rw-r--r--cpukit/score/cpu/unix/cpu.c62
-rw-r--r--cpukit/score/cpu/unix/rtems/score/cpu.h38
3 files changed, 54 insertions, 50 deletions
diff --git a/cpukit/score/cpu/unix/ChangeLog b/cpukit/score/cpu/unix/ChangeLog
index 5bd201514f..b0954559fc 100644
--- a/cpukit/score/cpu/unix/ChangeLog
+++ b/cpukit/score/cpu/unix/ChangeLog
@@ -1,3 +1,7 @@
+2004-03-30 Ralf Corsepius <ralf_corsepius@rtems.org>
+
+ * cpu.c, rtems/score/cpu.h: Convert to using c99 fixed size types.
+
2004-03-29 Ralf Corsepius <ralf_corsepius@rtems.org>
* configure.ac: RTEMS_TOP([../../../..]).
diff --git a/cpukit/score/cpu/unix/cpu.c b/cpukit/score/cpu/unix/cpu.c
index 3984a5d833..c0c700fab6 100644
--- a/cpukit/score/cpu/unix/cpu.c
+++ b/cpukit/score/cpu/unix/cpu.c
@@ -86,7 +86,7 @@ sigset_t posix_empty_mask;
void _CPU_Initialize_vectors(void)
{
- unsigned32 i;
+ uint32_t i;
proc_ptr old_handler;
/*
@@ -194,7 +194,7 @@ void _CPU_Context_From_CPU_Init()
*/
{
- extern unsigned32 _SYSTEM_ID;
+ extern uint32_t _SYSTEM_ID;
_SYSTEM_ID = 0x20c;
}
@@ -254,7 +254,7 @@ void _CPU_Sync_io_Init()
* _CPU_ISR_Get_level
*/
-unsigned32 _CPU_ISR_Get_level( void )
+uint32_t _CPU_ISR_Get_level( void )
{
sigset_t old_mask;
@@ -327,7 +327,7 @@ void _CPU_Initialize(
*/
void _CPU_ISR_install_raw_handler(
- unsigned32 vector,
+ uint32_t vector,
proc_ptr new_handler,
proc_ptr *old_handler
)
@@ -353,7 +353,7 @@ void _CPU_ISR_install_raw_handler(
void _CPU_ISR_install_vector(
- unsigned32 vector,
+ uint32_t vector,
proc_ptr new_handler,
proc_ptr *old_handler
)
@@ -460,20 +460,20 @@ void _CPU_Thread_Idle_body( void )
void _CPU_Context_Initialize(
Context_Control *_the_context,
- unsigned32 *_stack_base,
- unsigned32 _size,
- unsigned32 _new_level,
+ uint32_t *_stack_base,
+ uint32_t _size,
+ uint32_t _new_level,
void *_entry_point,
boolean _is_fp
)
{
- unsigned32 *addr;
- unsigned32 jmp_addr;
- unsigned32 _stack_low; /* lowest "stack aligned" address */
- unsigned32 _stack_high; /* highest "stack aligned" address */
- unsigned32 _the_size;
+ uint32_t *addr;
+ uint32_t jmp_addr;
+ uint32_t _stack_low; /* lowest "stack aligned" address */
+ uint32_t _stack_high; /* highest "stack aligned" address */
+ uint32_t _the_size;
- jmp_addr = (unsigned32) _entry_point;
+ jmp_addr = (uint32_t ) _entry_point;
/*
* On CPUs with stacks which grow down, we build the stack
@@ -481,10 +481,10 @@ void _CPU_Context_Initialize(
* grow up, we build the stack based on the _stack_low address.
*/
- _stack_low = (unsigned32)(_stack_base) + CPU_STACK_ALIGNMENT - 1;
+ _stack_low = (uint32_t )(_stack_base) + CPU_STACK_ALIGNMENT - 1;
_stack_low &= ~(CPU_STACK_ALIGNMENT - 1);
- _stack_high = (unsigned32)(_stack_base) + _size;
+ _stack_high = (uint32_t )(_stack_base) + _size;
_stack_high &= ~(CPU_STACK_ALIGNMENT - 1);
if (_stack_high > _stack_low)
@@ -503,11 +503,11 @@ void _CPU_Context_Initialize(
*(Context_Control_overlay *)_the_context =
_CPU_Context_Default_with_ISRs_disabled;
- addr = (unsigned32 *)_the_context;
+ addr = (uint32_t *)_the_context;
#if defined(__hppa__)
*(addr + RP_OFF) = jmp_addr;
- *(addr + SP_OFF) = (unsigned32)(_stack_low + CPU_FRAME_SIZE);
+ *(addr + SP_OFF) = (uint32_t )(_stack_low + CPU_FRAME_SIZE);
/*
* See if we are using shared libraries by checking
@@ -518,7 +518,7 @@ void _CPU_Context_Initialize(
if (jmp_addr & 0x40000000) {
jmp_addr &= 0xfffffffc;
- *(addr + RP_OFF) = *(unsigned32 *)jmp_addr;
+ *(addr + RP_OFF) = *(uint32_t *)jmp_addr;
}
#elif defined(__sparc__)
@@ -530,8 +530,8 @@ void _CPU_Context_Initialize(
asm ("ta 0x03"); /* flush registers */
*(addr + RP_OFF) = jmp_addr + ADDR_ADJ_OFFSET;
- *(addr + SP_OFF) = (unsigned32)(_stack_high - CPU_FRAME_SIZE);
- *(addr + FP_OFF) = (unsigned32)(_stack_high);
+ *(addr + SP_OFF) = (uint32_t )(_stack_high - CPU_FRAME_SIZE);
+ *(addr + FP_OFF) = (uint32_t )(_stack_high);
#elif defined(__i386__)
@@ -540,7 +540,7 @@ void _CPU_Context_Initialize(
*/
{
- unsigned32 stack_ptr;
+ uint32_t stack_ptr;
stack_ptr = _stack_high - CPU_FRAME_SIZE;
@@ -551,11 +551,11 @@ void _CPU_Context_Initialize(
*(addr + ESP_OFF) = stack_ptr;
*(addr + RET_OFF) = jmp_addr;
- addr = (unsigned32 *) stack_ptr;
+ addr = (uint32_t *) stack_ptr;
addr[ 0 ] = jmp_addr;
- addr[ 1 ] = (unsigned32) stack_ptr;
- addr[ 2 ] = (unsigned32) stack_ptr;
+ addr[ 1 ] = (uint32_t ) stack_ptr;
+ addr[ 2 ] = (uint32_t ) stack_ptr;
}
#else
@@ -667,7 +667,7 @@ void _CPU_Restore_float_context(
* _CPU_ISR_Disable_support
*/
-unsigned32 _CPU_ISR_Disable_support(void)
+uint32_t _CPU_ISR_Disable_support(void)
{
int status;
sigset_t old_mask;
@@ -693,7 +693,7 @@ unsigned32 _CPU_ISR_Disable_support(void)
*/
void _CPU_ISR_Enable(
- unsigned32 level
+ uint32_t level
)
{
int status;
@@ -723,7 +723,7 @@ void _CPU_ISR_Enable(
void _CPU_ISR_Handler(int vector)
{
extern void _Thread_Dispatch(void);
- extern unsigned32 _Thread_Dispatch_disable_level;
+ extern uint32_t _Thread_Dispatch_disable_level;
extern boolean _Context_Switch_necessary;
if (_ISR_Nest_level++ == 0) {
@@ -833,7 +833,7 @@ void _CPU_Stray_signal(int sig_num)
* _CPU_Fatal_error
*/
-void _CPU_Fatal_error(unsigned32 error)
+void _CPU_Fatal_error(uint32_t error)
{
setitimer(ITIMER_REAL, 0, 0);
@@ -950,10 +950,10 @@ extern void fix_syscall_errno( void );
int _CPU_SHM_Semid;
void _CPU_SHM_Init(
- unsigned32 maximum_nodes,
+ uint32_t maximum_nodes,
boolean is_master_node,
void **shm_address,
- unsigned32 *shm_length
+ uint32_t *shm_length
)
{
int i;
diff --git a/cpukit/score/cpu/unix/rtems/score/cpu.h b/cpukit/score/cpu/unix/rtems/score/cpu.h
index 8b604fee80..0738d02bfc 100644
--- a/cpukit/score/cpu/unix/rtems/score/cpu.h
+++ b/cpukit/score/cpu/unix/rtems/score/cpu.h
@@ -466,7 +466,7 @@ extern "C" {
* This is really just the area for the following fields.
*
* jmp_buf regs;
- * unsigned32 isr_level;
+ * uint32_t isr_level;
*
* Doing it this way avoids conflicts between the native stuff and the
* RTEMS stuff.
@@ -506,10 +506,10 @@ typedef struct {
void (*postdriver_hook)( void );
void (*idle_task)( void );
boolean do_zero_of_workspace;
- unsigned32 idle_task_stack_size;
- unsigned32 interrupt_stack_size;
- unsigned32 extra_mpci_receive_server_stack;
- void * (*stack_allocate_hook)( unsigned32 );
+ uint32_t idle_task_stack_size;
+ uint32_t interrupt_stack_size;
+ uint32_t extra_mpci_receive_server_stack;
+ void * (*stack_allocate_hook)( uint32_t );
void (*stack_free_hook)( void* );
/* end of required fields */
} rtems_cpu_table;
@@ -682,7 +682,7 @@ void _CPU_Initialize_vectors(void);
* level is returned in _level.
*/
-extern unsigned32 _CPU_ISR_Disable_support(void);
+extern uint32_t _CPU_ISR_Disable_support(void);
#define _CPU_ISR_Disable( _level ) \
do { \
@@ -695,7 +695,7 @@ extern unsigned32 _CPU_ISR_Disable_support(void);
* _level is not modified.
*/
-void _CPU_ISR_Enable(unsigned32 level);
+void _CPU_ISR_Enable(uint32_t level);
/*
* This temporarily restores the interrupt to _level before immediately
@@ -706,7 +706,7 @@ void _CPU_ISR_Enable(unsigned32 level);
#define _CPU_ISR_Flash( _level ) \
do { \
- register unsigned32 _ignored = 0; \
+ register uint32_t _ignored = 0; \
_CPU_ISR_Enable( (_level) ); \
_CPU_ISR_Disable( _ignored ); \
} while ( 0 )
@@ -728,7 +728,7 @@ void _CPU_ISR_Enable(unsigned32 level);
else _CPU_ISR_Enable( 1 ); \
}
-unsigned32 _CPU_ISR_Get_level( void );
+uint32_t _CPU_ISR_Get_level( void );
/* end of ISR handler macros */
@@ -789,9 +789,9 @@ unsigned32 _CPU_ISR_Get_level( void );
extern void _CPU_Context_Initialize(
Context_Control *_the_context,
- unsigned32 *_stack_base,
- unsigned32 _size,
- unsigned32 _new_level,
+ uint32_t *_stack_base,
+ uint32_t _size,
+ uint32_t _new_level,
void *_entry_point,
boolean _is_fp
);
@@ -910,7 +910,7 @@ void _CPU_Initialize(
*/
void _CPU_ISR_install_raw_handler(
- unsigned32 vector,
+ uint32_t vector,
proc_ptr new_handler,
proc_ptr *old_handler
);
@@ -922,7 +922,7 @@ void _CPU_ISR_install_raw_handler(
*/
void _CPU_ISR_install_vector(
- unsigned32 vector,
+ uint32_t vector,
proc_ptr new_handler,
proc_ptr *old_handler
);
@@ -995,11 +995,11 @@ void _CPU_Restore_float_context(
void _CPU_ISR_Set_signal_level(
- unsigned32 level
+ uint32_t level
);
void _CPU_Fatal_error(
- unsigned32 _error
+ uint32_t _error
);
/* The following routine swaps the endian format of an unsigned int.
@@ -1026,7 +1026,7 @@ static inline unsigned int CPU_swap_u32(
unsigned int value
)
{
- unsigned32 byte1, byte2, byte3, byte4, swapped;
+ uint32_t byte1, byte2, byte3, byte4, swapped;
byte4 = (value >> 24) & 0xff;
byte3 = (value >> 16) & 0xff;
@@ -1081,10 +1081,10 @@ void _CPU_Stop_clock( void );
#if defined(RTEMS_MULTIPROCESSING)
void _CPU_SHM_Init(
- unsigned32 maximum_nodes,
+ uint32_t maximum_nodes,
boolean is_master_node,
void **shm_address,
- unsigned32 *shm_length
+ uint32_t *shm_length
);
int _CPU_Get_pid( void );