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| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2016-11-11 10:16:33 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2016-11-18 07:30:32 +0100 |
| commit | 82d30a310c69a9a374f45a571b551b0d0a838777 (patch) | |
| tree | e20b6272303ae845c5a96f6d78727e3f9ab2484e /cpukit/score/cpu/sparc/rtems/score/cpuimpl.h | |
| parent | score: Add and use _Thread_Dispatch_direct() (diff) | |
| download | rtems-82d30a310c69a9a374f45a571b551b0d0a838777.tar.bz2 | |
score: Move CPU_PER_CPU_CONTROL_SIZE
Move CPU_PER_CPU_CONTROL_SIZE and the optional CPU_Per_CPU_control to
<rtems/score/cpuimpl.h> to hide it from <rtems.h>.
Diffstat (limited to '')
| -rw-r--r-- | cpukit/score/cpu/sparc/rtems/score/cpuimpl.h | 44 |
1 files changed, 43 insertions, 1 deletions
diff --git a/cpukit/score/cpu/sparc/rtems/score/cpuimpl.h b/cpukit/score/cpu/sparc/rtems/score/cpuimpl.h index bb53bf996f..27a8d776b8 100644 --- a/cpukit/score/cpu/sparc/rtems/score/cpuimpl.h +++ b/cpukit/score/cpu/sparc/rtems/score/cpuimpl.h @@ -5,7 +5,8 @@ */ /* - * Copyright (c) 2015, 2016 embedded brains GmbH + * Copyright (c) 2007 On-Line Applications Research Corporation (OAR) + * Copyright (c) 2013, 2016 embedded brains GmbH * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at @@ -17,12 +18,53 @@ #include <rtems/score/cpu.h> +#if ( SPARC_HAS_FPU == 1 ) + #define CPU_PER_CPU_CONTROL_SIZE 8 +#else + #define CPU_PER_CPU_CONTROL_SIZE 4 +#endif + +/** + * @brief Offset of the CPU_Per_CPU_control::isr_dispatch_disable field + * relative to the Per_CPU_Control begin. + */ +#define SPARC_PER_CPU_ISR_DISPATCH_DISABLE 0 + +#if ( SPARC_HAS_FPU == 1 ) + /** + * @brief Offset of the CPU_Per_CPU_control::fsr field relative to the + * Per_CPU_Control begin. + */ + #define SPARC_PER_CPU_FSR_OFFSET 4 +#endif + #ifndef ASM #ifdef __cplusplus extern "C" { #endif +typedef struct { + /** + * This flag is context switched with each thread. It indicates + * that THIS thread has an _ISR_Dispatch stack frame on its stack. + * By using this flag, we can avoid nesting more interrupt dispatching + * attempts on a previously interrupted thread's stack. + */ + uint32_t isr_dispatch_disable; + +#if ( SPARC_HAS_FPU == 1 ) + /** + * @brief Memory location to store the FSR register during interrupt + * processing. + * + * This is a write-only field. The FSR is written to force a completion of + * floating point operations in progress. + */ + uint32_t fsr; +#endif +} CPU_Per_CPU_control; + /** * @brief The pointer to the current per-CPU control is available via register * g6. |