sparc: More reliable bad trap handling

Statically initialize the trap table in start.S to jump to _SPARC_Bad_trap()
for all unexpected traps.  This enables a proper RTEMS fatal error handling
right from the start.  Do not rely on the stack and register settings which
caused an unexpected trap.  Use the ISR stack of the processor to do the fatal
error handling.  Save the full context which caused the trap.  Fatal error
handler may use it for error logging.

Unify the _CPU_Exception_frame_print() implementations and move it to cpukit.

Update #4459.

2 files changed, 74 insertions, 1 deletions

diff --git a/cpukit/score/cpu/sparc/include/rtems/score/cpu.h b/cpukit/score/cpu/sparc/include/rtems/score/cpu.h
index 0daf1d9a28..f3f50d4f78 100644
--- a/cpukit/score/cpu/sparc/include/rtems/score/cpu.h
+++ b/cpukit/score/cpu/sparc/include/rtems/score/cpu.h
@@ -1023,9 +1023,60 @@ RTEMS_NO_RETURN void _CPU_Context_restore( Context_Control *new_context );
   } while ( 0 )
 #endif
 
+/**
+ * @brief This structure contains the local and input registers of a register
+ *   window.
+ */
 typedef struct {
+  /** @brief This member contains the local 0..7 register values. */
+  uint32_t local[ 8 ];
+
+  /** @brief This member contains the input 0..7 register values. */
+  uint32_t input[ 8 ];
+} SPARC_Register_window;
+
+/**
+ * @brief This structure contains the register set of a context which caused an
+ *   unexpected trap.
+ */
+typedef struct {
+  /** @brief This member contains the PSR register value. */
+  uint32_t psr;
+
+  /** @brief This member contains the PC value. */
+  uint32_t pc;
+
+  /** @brief This member contains the nPC value. */
+  uint32_t npc;
+
+  /** @brief This member contains the trap number. */
   uint32_t trap;
-  CPU_Interrupt_frame *isf;
+
+  /** @brief This member contains the WIM register value. */
+  uint32_t wim;
+
+  /** @brief This member contains the Y register value. */
+  uint32_t y;
+
+  /** @brief This member contains the global 0..7 register values. */
+  uint32_t global[ 8 ];
+
+  /** @brief This member contains the output 0..7 register values. */
+  uint32_t output[ 8 ] ;
+
+  /**
+   * @brief This member contains the additional register windows according to
+   *   the saved WIM.
+   */
+  SPARC_Register_window windows[ SPARC_NUMBER_OF_REGISTER_WINDOWS - 1 ];
+
+#if SPARC_HAS_FPU == 1
+  /** This member contain the FSR register value. */
+  uint32_t fsr;
+
+  /** @brief This member contains the floating point 0..31 register values. */
+  uint64_t fp[ 16 ];
+#endif
 } CPU_Exception_frame;
 
 void _CPU_Exception_frame_print( const CPU_Exception_frame *frame );
diff --git a/cpukit/score/cpu/sparc/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/sparc/include/rtems/score/cpuimpl.h
index a99da74fa9..a8ed0aec23 100644
--- a/cpukit/score/cpu/sparc/include/rtems/score/cpuimpl.h
+++ b/cpukit/score/cpu/sparc/include/rtems/score/cpuimpl.h
@@ -117,6 +117,28 @@
   #endif
 #endif
 
+#define SPARC_REGISTER_WINDOW_OFFSET_LOCAL( i ) ( ( i ) * 4 )
+#define SPARC_REGISTER_WINDOW_OFFSET_INPUT( i ) ( ( i ) * 4 + 32 )
+#define SPARC_REGISTER_WINDOW_SIZE 64
+
+#define SPARC_EXCEPTION_OFFSET_PSR 0
+#define SPARC_EXCEPTION_OFFSET_PC 4
+#define SPARC_EXCEPTION_OFFSET_NPC 8
+#define SPARC_EXCEPTION_OFFSET_TRAP 12
+#define SPARC_EXCEPTION_OFFSET_WIM 16
+#define SPARC_EXCEPTION_OFFSET_Y 20
+#define SPARC_EXCEPTION_OFFSET_GLOBAL( i ) ( ( i ) * 4 + 24 )
+#define SPARC_EXCEPTION_OFFSET_OUTPUT( i ) ( ( i ) * 4 + 56 )
+#define SPARC_EXCEPTION_OFFSET_WINDOWS( i ) ( ( i ) * 64 + 88 )
+
+#if SPARC_HAS_FPU == 1
+#define SPARC_EXCEPTION_OFFSET_FSR 536
+#define SPARC_EXCEPTION_OFFSET_FP( i ) ( ( i ) * 8 + 544 )
+#define SPARC_EXCEPTION_FRAME_SIZE 672
+#else
+#define SPARC_EXCEPTION_FRAME_SIZE 536
+#endif
+
 #ifndef ASM
 
 #ifdef __cplusplus