diff options
author | Joel Sherrill <joel.sherrill@OARcorp.com> | 2011-07-24 23:43:20 +0000 |
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committer | Joel Sherrill <joel.sherrill@OARcorp.com> | 2011-07-24 23:43:20 +0000 |
commit | 7c2f2448499f1ad342a56ecf1b778f9a290f80fd (patch) | |
tree | d5631c305e97205ead63915f7bc07fb2d5cd8cda /cpukit/score/cpu/sparc/cpu.c | |
parent | 2011-07-24 Joel Sherrill <joel.sherrill@oarcorp.com> (diff) | |
download | rtems-7c2f2448499f1ad342a56ecf1b778f9a290f80fd.tar.bz2 |
2011-07-24 Joel Sherrill <joel.sherrill@oarcorp.com>
* cpu.c: Remove /*PAGE markers which were interpreted by a long dead
print script.
Diffstat (limited to '')
-rw-r--r-- | cpukit/score/cpu/sparc/cpu.c | 15 |
1 files changed, 5 insertions, 10 deletions
diff --git a/cpukit/score/cpu/sparc/cpu.c b/cpukit/score/cpu/sparc/cpu.c index 52ba52f738..383319d0d7 100644 --- a/cpukit/score/cpu/sparc/cpu.c +++ b/cpukit/score/cpu/sparc/cpu.c @@ -36,8 +36,7 @@ const CPU_Trap_table_entry _CPU_Trap_slot_template = { 0xa6102000 /* mov _vector, %l3 */ }; -/*PAGE - * +/* * _CPU_Initialize * * This routine performs processor dependent initialization. @@ -73,8 +72,7 @@ void _CPU_Initialize(void) _CPU_ISR_Dispatch_disable = 0; } -/*PAGE - * +/* * _CPU_ISR_Get_level * * Input Parameters: NONE @@ -92,8 +90,7 @@ uint32_t _CPU_ISR_Get_level( void ) return level; } -/*PAGE - * +/* * _CPU_ISR_install_raw_handler * * This routine installs the specified handler as a "raw" non-executive @@ -200,8 +197,7 @@ void _CPU_ISR_install_raw_handler( } -/*PAGE - * +/* * _CPU_ISR_install_vector * * This kernel routine installs the RTEMS handler for the @@ -253,8 +249,7 @@ void _CPU_ISR_install_vector( _ISR_Vector_table[ real_vector ] = new_handler; } -/*PAGE - * +/* * _CPU_Context_Initialize * * This kernel routine initializes the basic non-FP context area associated |