diff options
| author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-01-28 12:10:08 +0100 |
|---|---|---|
| committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2014-02-04 10:06:35 +0100 |
| commit | 022851aba54d32831feaff13deb3d9943e130eee (patch) | |
| tree | c1d6a8404dae393bd147790f6a9cf09c2f327b5a /cpukit/score/cpu/sparc/cpu.c | |
| parent | bsps: Thread-local storage (TLS) for linkcmds (diff) | |
| download | rtems-022851aba54d32831feaff13deb3d9943e130eee.tar.bz2 | |
Add thread-local storage (TLS) support
Tested and implemented on ARM, m68k, PowerPC and SPARC. Other
architectures need more work.
Diffstat (limited to '')
| -rw-r--r-- | cpukit/score/cpu/sparc/cpu.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/cpukit/score/cpu/sparc/cpu.c b/cpukit/score/cpu/sparc/cpu.c index 1865a21ee8..11e31f9d10 100644 --- a/cpukit/score/cpu/sparc/cpu.c +++ b/cpukit/score/cpu/sparc/cpu.c @@ -20,6 +20,7 @@ #include <rtems/system.h> #include <rtems/score/isr.h> #include <rtems/score/percpu.h> +#include <rtems/score/tls.h> #include <rtems/rtems/cache.h> RTEMS_STATIC_ASSERT( @@ -232,7 +233,8 @@ void _CPU_Context_Initialize( uint32_t size, uint32_t new_level, void *entry_point, - bool is_fp + bool is_fp, + void *tls_area ) { uint32_t stack_high; /* highest "stack aligned" address */ @@ -285,4 +287,10 @@ void _CPU_Context_Initialize( * thread can have an _ISR_Dispatch stack frame on its stack. */ the_context->isr_dispatch_disable = 0; + + if ( tls_area != NULL ) { + void *tcb = _TLS_TCB_after_tls_block_initialize( tls_area ); + + the_context->g7 = (uintptr_t) tcb; + } } |