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author | Joel Sherrill <joel@rtems.org> | 2018-03-08 17:23:21 -0600 |
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committer | Joel Sherrill <joel@rtems.org> | 2018-03-12 14:29:40 -0500 |
commit | 5b88ec5b68b3773da09d78dae68d716e4f009215 (patch) | |
tree | 744f6b9303b54b4e8cfe56f3e0b39739233c5ca7 /cpukit/score/cpu/riscv/include/rtems/score/types.h | |
parent | arm/include/rtems/score/types.h: Eliminate this file (diff) | |
download | rtems-5b88ec5b68b3773da09d78dae68d716e4f009215.tar.bz2 |
riscv/include/rtems/score/types.h: Eliminate this file
Updates #3327.
Diffstat (limited to '')
-rw-r--r-- | cpukit/score/cpu/riscv/include/rtems/score/types.h | 70 |
1 files changed, 0 insertions, 70 deletions
diff --git a/cpukit/score/cpu/riscv/include/rtems/score/types.h b/cpukit/score/cpu/riscv/include/rtems/score/types.h deleted file mode 100644 index d1440fb319..0000000000 --- a/cpukit/score/cpu/riscv/include/rtems/score/types.h +++ /dev/null @@ -1,70 +0,0 @@ -/** - * @file - * - * @brief RISC-V Architecture Types API - */ - -/* - * This include file contains type definitions pertaining to the - * RISC-V processor family. - * - * COPYRIGHT (c) 2014 Hesham Almatary <heshamelmatary@gmail.com> - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - */ - -#ifndef _RTEMS_SCORE_TYPES_H -#define _RTEMS_SCORE_TYPES_H - -#include <rtems/score/basedefs.h> - -#ifndef ASM - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * @addtogroup ScoreCPU - */ -/**@{**/ - -/* - * This section defines the basic types for this processor. - */ - -/** Type that can store a 32-bit integer or a pointer. */ -typedef uintptr_t CPU_Uint32ptr; - -typedef uint16_t Priority_bit_map_Word; -typedef void riscv_isr; -typedef void ( *riscv_isr_entry )( void ); - -/** @} */ - -#ifdef __cplusplus -} -#endif - -#endif /* !ASM */ - -#endif |