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authorSebastian Huber <sebastian.huber@embedded-brains.de>2022-06-29 14:37:47 +0200
committerSebastian Huber <sebastian.huber@embedded-brains.de>2022-07-04 08:30:42 +0200
commit03e4d1e931cdd6582ccc92b3a4dc883b446b5647 (patch)
treedea1774058ed7d4c209d594ed6ea50aae3f6656d /cpukit/score/cpu/powerpc
parentlibtests/crypt01: Avoid stack overflows (diff)
downloadrtems-03e4d1e931cdd6582ccc92b3a4dc883b446b5647.tar.bz2
score: Add _CPU_Use_thread_local_storage()
At some point during system initialization, the idle threads are created. Afterwards, the boot processor basically executes within the context of an idle thread with thread dispatching disabled. On some architectures, the thread-local storage area of the associated thread must be set in dedicated processor registers. Add the new CPU port function to do this: void _CPU_Use_thread_local_storage( const Context_Control *context ) Close #4672.
Diffstat (limited to 'cpukit/score/cpu/powerpc')
-rw-r--r--cpukit/score/cpu/powerpc/include/rtems/score/cpuimpl.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/cpukit/score/cpu/powerpc/include/rtems/score/cpuimpl.h b/cpukit/score/cpu/powerpc/include/rtems/score/cpuimpl.h
index cfed43ced4..4a88fe18b1 100644
--- a/cpukit/score/cpu/powerpc/include/rtems/score/cpuimpl.h
+++ b/cpukit/score/cpu/powerpc/include/rtems/score/cpuimpl.h
@@ -283,6 +283,22 @@ RTEMS_INLINE_ROUTINE void _CPU_Instruction_no_operation( void )
__asm__ volatile ( "nop" );
}
+RTEMS_INLINE_ROUTINE void _CPU_Use_thread_local_storage(
+ const Context_Control *context
+)
+{
+#ifdef __powerpc64__
+ register uintptr_t tp __asm__( "13" );
+#else
+ register uintptr_t tp __asm__( "2" );
+#endif
+
+ tp = ppc_get_context( context )->tp;
+
+ /* Make sure that the register assignment is not optimized away */
+ __asm__ volatile ( "" : : "r" ( tp ) );
+}
+
#ifdef __cplusplus
}
#endif