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authorSebastian Huber <sebastian.huber@embedded-brains.de>2023-01-22 19:32:45 +0100
committerSebastian Huber <sebastian.huber@embedded-brains.de>2023-01-23 09:56:52 +0100
commit4f274b69254096cbf776838fe4de8d3d3ae12d5e (patch)
tree70bb753a47653b3a449d7f6a793cd1df9b990041 /cpukit/score/cpu/powerpc/include/rtems/powerpc/registers.h
parentbuild: Update PyYAML to 5.4.1 (diff)
downloadrtems-4f274b69254096cbf776838fe4de8d3d3ae12d5e.tar.bz2
powerpc: Increase MAS0 ESEL width
For example, the QorIQ T4240 has more than 16 TLB1 entries.
Diffstat (limited to '')
-rw-r--r--cpukit/score/cpu/powerpc/include/rtems/powerpc/registers.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/cpukit/score/cpu/powerpc/include/rtems/powerpc/registers.h b/cpukit/score/cpu/powerpc/include/rtems/powerpc/registers.h
index b651261493..271dcc36af 100644
--- a/cpukit/score/cpu/powerpc/include/rtems/powerpc/registers.h
+++ b/cpukit/score/cpu/powerpc/include/rtems/powerpc/registers.h
@@ -541,8 +541,8 @@ lidate */
#define FSL_EIS_MAS0 624
#define FSL_EIS_MAS0_TLBSEL (1 << (63 - 35))
-#define FSL_EIS_MAS0_ESEL(n) ((0xf & (n)) << (63 - 47))
-#define FSL_EIS_MAS0_ESEL_GET(m) (((m) >> (63 - 47)) & 0xf)
+#define FSL_EIS_MAS0_ESEL(n) ((0xfff & (n)) << (63 - 47))
+#define FSL_EIS_MAS0_ESEL_GET(m) (((m) >> (63 - 47)) & 0xfff)
#define FSL_EIS_MAS0_NV (1 << (63 - 63))
#define FSL_EIS_MAS1 625