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author | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-06-19 14:59:51 +0200 |
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committer | Sebastian Huber <sebastian.huber@embedded-brains.de> | 2018-06-27 08:58:16 +0200 |
commit | c8df844cf3bddde0221614843c97cb6c950cdba9 (patch) | |
tree | 67101cb39d5bdd406f785d33629703e5a876ed75 /cpukit/score/cpu/or1k/include/rtems/score/cpu.h | |
parent | console: Add missing return status (diff) | |
download | rtems-c8df844cf3bddde0221614843c97cb6c950cdba9.tar.bz2 |
score: Add CPU_INTERRUPT_STACK_ALIGNMENT
Add CPU port define for the interrupt stack alignment. The alignment
should take the stack ABI and the cache line size into account.
Update #3459.
Diffstat (limited to 'cpukit/score/cpu/or1k/include/rtems/score/cpu.h')
-rw-r--r-- | cpukit/score/cpu/or1k/include/rtems/score/cpu.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/cpukit/score/cpu/or1k/include/rtems/score/cpu.h b/cpukit/score/cpu/or1k/include/rtems/score/cpu.h index 1dedeb6629..4f8df4a7f0 100644 --- a/cpukit/score/cpu/or1k/include/rtems/score/cpu.h +++ b/cpukit/score/cpu/or1k/include/rtems/score/cpu.h @@ -462,6 +462,8 @@ typedef Context_Control CPU_Interrupt_frame; #define CPU_STACK_ALIGNMENT 0 +#define CPU_INTERRUPT_STACK_ALIGNMENT CPU_CACHE_LINE_BYTES + /* ISR handler macros */ /* |